Intelligent Metamodel Integrated Verilog-AMS for Fast and Accurate Analog Block Design Exploration
Description:
Patent relating to a method for modeling a circuit comprising storing a plurality of design variable ranges for a circuit component in a non-transient electronic data memory.
Date:
May 5, 2015
Creator:
Mohanty, Saraju P.; Kougianos, Elias & Zheng, Geng
Item Type:
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Patent
Partner:
UNT College of Engineering