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NFS as a user interface to a high-performance data system

Description: The Network File System (NFS) will be the user interface to a High-Performance Data System (HPDS) being developed at Los Alamos National Laboratory (LANL). HPDS will manage high-capacity, high-performance storage systems connected directly to a high-speed network from distributed workstations. NFS will be modified to maximize performance and to manage massive amounts of data. 6 refs., 3 figs.
Date: January 1, 1991
Creator: Mercier, C.W.
Partner: UNT Libraries Government Documents Department
open access

Balance in machine architecture: Bandwidth on board and offboard, integer/control speed and flops versus memory

Description: The issues to be addressed here are those of balance'' in machine architecture. By this, we mean how much emphasis must be placed on various aspects of the system to maximize its usefulness for physics. There are three components that contribute to the utility of a system: How the machine can be used, how big a problem can be attacked, and what the effective capabilities (power) of the hardware are like. The effective power issue is a matter of evaluating the impact of design decisions trading … more
Date: April 1, 1992
Creator: Fischler, M.
Partner: UNT Libraries Government Documents Department
open access

An assessment of the ModSim/TWOS parallel simulation environment

Description: The Time Warp Operating System (TWOS) has been the focus of significant research in parallel, discrete-event simulation (PDES). A new language, ModSim, has been developed for use in conjunction with TWOS. The coupling of ModSim and TWOS is an attempt to address the development of large-scale, complex, discrete-event simulation models for parallel execution. The approach, simply stated, is to provide a high-level simulation-language that embodies well-known software engineering principles combin… more
Date: January 1, 1991
Creator: Rich, D.O. & Michelsen, R.E.
Partner: UNT Libraries Government Documents Department
open access

Measurement of memory access contentions in multiple vector processor systems

Description: The purpose of this paper is to study delays encountered when several vector processors access a common memory. Such delays may be caused by access conflicts at the memory or by contentions within the network connection processors to common memory. Because such delays are potentially the limiting performance bottleneck of common memory architectures, it is important to understand how they depend on design parameters, in particular the number of processors serviced by the common memory, the degr… more
Date: January 1, 1991
Creator: Bucher, I. Y. & Simmons, M. L.
Partner: UNT Libraries Government Documents Department
open access

Hypertext-based integration for nuclear plant maintenance and operations

Description: A methodology is presented that uses fuzzy graphs in the emerging paradigm of hypertext for the purpose of integrating data, information and multifaceted knowledge resources abounding in power plant operations and maintenance. A hypertext system is viewed as a set of nodes and links where with each link we associate membership functions embodying context-dependent criteria for navigating large information spaces. A general framework for navigation is outlined and graph-theory navigational tools… more
Date: January 1, 1991
Creator: Tsoukalas, L.H.; Upadhyaya, B.R. (Tennessee Univ., Knoxville, TN (United States). Dept. of Nuclear Engineering) & Clapp, N.E. (Oak Ridge National Lab., TN (United States))
Partner: UNT Libraries Government Documents Department
open access

Cedar Project---Original goals and progress to date

Description: This report describes: Cedar System Hardware; Compiler and Software Issues on Memory Management; Operating Systems; Compilers; and Multiprocessor Performance on Algorithms and Applications.
Date: September 5, 1991
Creator: Cybenko, G.; Kuck, D.; Padua, D. & Gallopoulos, E.
Partner: UNT Libraries Government Documents Department
open access

Emerging supercomputer architectures

Description: This paper will examine the current and near future trends for commercially available high-performance computers with architectures that differ from the mainstream ''supercomputer'' systems in use for the last few years. These emerging supercomputer architectures are just beginning to have an impact on the field of high performance computing. 7 refs., 1 tab.
Date: January 1, 1987
Creator: Messina, P. C.
Partner: UNT Libraries Government Documents Department
open access

The structured memory access architecture: An implementation and performance-evaluation

Description: The Structured Memory Access (SMS) architecture implementation presented in this thesis is formulated with the intention of alleviating two well-known inefficiencies that exist in current scalar computer architectures: address generation overhead and memory bandwidth utilization. Furthermore, the SMA architecture introduces an additional level of parallelism which is not present in current pipelined supercomputers, namely, overlapped execution of the access process and execute process on two di… more
Date: August 1, 1986
Creator: Cyr, J.B.
Partner: UNT Libraries Government Documents Department
open access

FY 2006 Accomplishment Colony - "Services and Interfaces to Support Large Numbers of Processors"

Description: The Colony Project is developing operating system and runtime system technology to enable efficient general purpose environments on tens of thousands of processors. To accomplish this, we are investigating memory management techniques, fault management strategies, and parallel resource management schemes. Recent results show promising findings for scalable strategies based on processor virtualization, in-memory checkpointing, and parallel aware modifications to full featured operating systems.
Date: June 30, 2006
Creator: Jones, T.; Kale, L.; Moreira, J.; Mendes, C.; Chakravorty, S.; Tauferner, A. et al.
Partner: UNT Libraries Government Documents Department
open access

Programmability of the HPCS Languages: A Case Study with a Quantum Chemistry Kernel (Extended Version)

Description: As high-end computer systems present users with rapidly increasing numbers of processors, possibly also incorporating attached co-processors, programmers are increasingly challenged to express the necessary levels of concurrency with the dominant parallel programming model, Fortran+MPI+OpenMP (or minor variations). In this paper, we examine the languages developed under the DARPA High-Productivity Computing Systems (HPCS) program (Chapel, Fortress, and X10) as representatives of a different par… more
Date: April 1, 2008
Creator: Shet, Aniruddha G; Elwasif, Wael R; Harrison, Robert J & Bernholdt, David E
Partner: UNT Libraries Government Documents Department
open access

Thermodynamics of computation and information distance

Description: Applying the tools of algorithmic information theory, we compare several candidates for an asymptotically machine-independent. absolute measure of the informational or cognitive'' distance between discrete objects x and y. The maximum of the conditional Kolmogorov complexities max[l brace]K(y[vert bar]z) K(m[vert bar]y)[r brace], is shown to be optimal, in the sense of being minimal within an additive constant among semicomputable, symmetric, positive semidefinite functions of z and y satisfyin… more
Date: March 12, 1993
Creator: Bennett, C.H.; Gacs, P.; Li, M.; Vitanyi, P.M.B. & Zurek, W.H.
Partner: UNT Libraries Government Documents Department
open access

A system for simulating shared memory in heterogeneous distributed-memory networks with specialization for robotics applications

Description: Hetero Helix is a programming environment which simulates shared memory on a heterogeneous network of distributed-memory computers. The machines in the network may vary with respect to their native operating systems and internal representation of numbers. Hetero Helix presents a simple programming model to developers, and also considers the needs of designers, system integrators, and maintainers. The key software technology underlying Hetero Helix is the use of a compiler'' which analyzes the d… more
Date: January 1, 1991
Creator: Jones, J.P.; Bangs, A.L. & Butler, P.L.
Partner: UNT Libraries Government Documents Department
open access

High level language memory management on parallel architectures

Description: HEP memory management packages such as YBOS and ZEBRA have been implemented and are currently running on a variety of mainframe computers. These packages were originally designed to run on single CPU engines. Implementation of these packages on parallel machines, loosely or tightly coupled architectures is discussed. ZEBRA (CERN package) on ACP (Fermilab) is presented in detail. Design of memory management system for the new generation of ACP systems or similar parallel architectures are presen… more
Date: May 1, 1989
Creator: Lebrun, P. & Kreymer, A.
Partner: UNT Libraries Government Documents Department
open access

Software development tools for the CDF MX scanner

Description: This paper discuses the design of the high level assembler and diagnostic control program developed for the MX, a high speed, custom designed computer used in the CDF data acquisition system at Fermilab. These programs provide a friendly productive environment for the development of software on the MX. Details of their implementation and special features, and some of the lessons learned during their development are included.
Date: November 1, 1991
Creator: Stuermer, W.; Turner, K. & Littleton-Sestini, S.
Partner: UNT Libraries Government Documents Department
open access

Roo: A Parallel Theorem Prover

Description: We describe a parallel theorem prover based on the Argonne theorem-proving system OTTER. The parallel system, called Roo, runs on shared-memory multiprocessors such as the Sequent Symmetry. We explain the parallel algorithm used and give performance results that demonstrate near-linear speedups on large problems.
Date: November 1, 1991
Creator: Lusk, E. L.; McCune, W. W. & Slaney, J. K.
Partner: UNT Libraries Government Documents Department
open access

ParaGraph-RTS: A parallel reduction-based run-time system

Description: We are investigating the use of the functional programming paradigm on multiprocessor computers. We have developed a parallel graph reduction run-time system called ParaGraph-RTS (Parallel Graph Reduction) that provides both significant amounts of exploitable parallelism and the robustness to support development of large scientific codes. This system allows us to empirically investigate the functional programming paradigm within computationally intensive application domains. In this paper, we d… more
Date: January 1, 1989
Creator: Yantis, B.; Rich, D. & Michelsen, R.
Partner: UNT Libraries Government Documents Department
open access

Debugging Fortran on a shared memory machine

Description: Debugging on a parallel processor is more difficult than debugging on a serial machine because errors in a parallel program may introduce nondeterminism. The approach to parallel debugging presented here attempts to reduce the problem of debugging on a parallel machine to that of debugging on a serial machine by automatically detecting nondeterminism. 20 refs., 6 figs.
Date: January 1, 1987
Creator: Allen, T.R. & Padua, D.A.
Partner: UNT Libraries Government Documents Department
open access

VTI: VME/CIPRICO Interface routines

Description: This document details the VME/CIPRICO Interface routines (VII). These routines where designed to allow programs written in PILS running on a MVME 101 under Valet-plus to control a CIPRICO tape controller. The routines fall into two general types. The low level routines, such as vti-make-pb, create the data structures used by the CIPRICO as well as manipulate the CIPRICO's control registers. The high level routines, such as vti-rewind, use the lower level routines to carry out complete functions… more
Date: September 4, 1987
Creator: Alleva, D.
Partner: UNT Libraries Government Documents Department
open access

ASSESS (Analytic System and Software for Evaluating Safeguards and Security) update: Current status and future developments

Description: The Analytic System and Software for Evaluating Safeguards and Security (ASSESS) has been released for use by DOE field offices and their contractors. In October, 1989, we offered a prototype workshop to selected representatives of the DOE community. Based on the prototype results, we held the first training workshop at the Central Training Academy in January, 1990. Four additional workshops are scheduled for FY 1990. ASSESS is a state-of-the-art analytical tool for management to conduct integr… more
Date: July 15, 1990
Creator: Al-Ayat, R.A. (Lawrence Livermore National Lab., CA (USA)); Cousins, T.D. (USDOE, Washington, DC (USA)) & Hoover, E.R. (Sandia National Labs., Albuquerque, NM (USA))
Partner: UNT Libraries Government Documents Department
open access

The scalable coherent interface, IEEE P1596, status and possible applications to data acquisition and physics

Description: IEEE P1596, the Scalable Coherent Interface (formerly known as SuperBus) is based on experience gained while developing Fastbus (ANSI/IEEE 960-1986, IEC 935), Futurebus (IEEE P896.x) and other modern 32-bit buses. SCI goals include a minimum bandwidth of 1 GByte/sec per processor in multiprocessor systems with thousands of processors; efficient support of a coherent distributed-cache image of distributed shared memory; support for repeaters which interface to existing or future buses; and suppo… more
Date: January 1, 1990
Creator: Gustavson, D.B.
Partner: UNT Libraries Government Documents Department
open access

Large-grain pipelining on hypercube multiprocessors

Description: A new paradigm, called large-grain pipelining, for developing efficient parallel algorithms on distributed-memory multiprocessors, e.g., hypercube machines, is introduced. Large-grain pipelining attempts to maximize the degree of overlapping and minimize the effect of communication overhead in a multiprocessor system through macro-pipelining between the nodes. Algorithms developed through large-grain pipelining to perform matrix multiplication are presented. To model the pipelined computations,… more
Date: January 1, 1988
Creator: King, Chung-Ta & Ni, Lionel M.
Partner: UNT Libraries Government Documents Department
open access

Recent experiences and future expectations in data storage technology

Description: For more than 10 years the conventional media for High Energy Physics has been 9 track magnetic tape in various densities. More recently, especially in Europe, the IBM 3480 technology has been adopted while in the United States, especially at Fermilab, 8mm is being used by the largest experiments as a primary recording media and where possible they are using 8mm for the production, analysis and distribution of data summary tapes. VHS and Digital Audio tape have recurrently appeared but seem to … more
Date: April 1, 1990
Creator: Pfister, J.
Partner: UNT Libraries Government Documents Department
open access

A proof-of-concept implementation of persistence in a hierarchical storage system

Description: The concept of providing transparent access to a collection of files in a mass storage system is a familiar one. The goal of this project was to investigate the feasibility of providing similar access to a collection of persistent, complex objects. We describe an architecture for interfacing a persistent store of complex objects to a hierarchical storage system. Persistent object stores support the uniform creation, storage, and access of complex objects, regardless of their lifetimes. In other… more
Date: January 1, 1992
Creator: Grossman, R.; Qin, Xiao (Illinois Univ., Chicago, IL (United States). Lab. for Advanced Computing) & Lifka, D. (Argonne National Lab., IL (United States). High Energy Physics Div.)
Partner: UNT Libraries Government Documents Department
open access

The KSR1: Experimentation and modeling of poststore

Description: Kendall Square Research introduced the KSR1 system in 1991. The architecture is based on a ring of rings of 64-bit microprocessors. It is a distributed, shared memory system and is scalable. The memory structure is unique and is the key to understanding the system. Different levels of caching eliminates physical memory addressing and leads to the ALLCACHE[trademark] scheme. Since requested data may be found in any of several caches, the initial access time is variable. Once pulled into the loca… more
Date: February 1, 1993
Creator: Rosti, E.; Smirni, E.; Wagner, T. D.; Apon, A. W. & Dowdy, L. W.
Partner: UNT Libraries Government Documents Department
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