High temperature superconducting digital circuits and subsystems Page: 5 of 8
4 p.View a full description of this article.
Extracted Text
The following text was automatically extracted from the image on this page using optical character recognition software:
fAUG 10 ' 3 04:29P1M CONDUCTUS
Shift registers represent unc of the more claborate
components and they are surprisingly easy to implement
in superconducting technology. One structure, based on
pulse manipulation6, is shown in Fig. 4. The inftrotation
rs stored in the lower data register ns the presence or
absence of a cirulating loop of current in each ceti. Such
data is relatively easy to readout with an individual
superconducting quantum interference device (SQUID. 2
juncdons in an itiduetivc loop) or with a flux flow-based
amuiliflert. A clock pulse propagutes along the arbitration
register, whose purpose is to ensure that the clock pulse
gets to the right se ment at the right time, causing the
circulating current bits to move to the adjacent cell. Since
only a single junction must switch to perform the move,
the minimum clock period can theoretically be less than 5
ps. Clock periods as low as R-9 ps have been
demonstrated with limited data sets,
NowI Mtetal bia . bro
lInput
s.
I .
It~z
Timing in
To output
terminationTap coupling to XOR feedback
(it used)
Figure 4. Structure ofa flux quantum-based shift register
it which the x's rsprtsert junctions. Data is contained in
the lower data' reg gist'r in 1/te form ofthe presence or
uhsence of a circutaiig current in ite loops lbrtween
pairs of junctions.
Of great use in military and commercial elcctronics
applications are pseudo-randonm bit sequencers (PRES)
which also provide one of the best ways to test these shift
registers at speed7. The concept of the PRBS is shown in
Fig. 5 and it consists, in its simplest form, of a shift
register with feedback in the form of an exclusive-OR of
two of the last few bits. For a given starting register state
(not all Os), the register will produce a stream of
seemingly random bits. This stream will be completely
reproducible with the same starting data. Such a structure
ia obviously useful for encoding but is also ideal for
testing a variety of digital and communications devices
since it avoids some pattern dependent results. To tost
shift registers, two PRBS blocks can be used. Each is
loaded with the same starting data (which can be done at
low speed with a large clock period). The outputs are
coupled to another cxcluslve-OR gate and the high speed
clocks to the PRBS units arc started. Every time there is a
difference between the two register outputs, the XOR
output will go high, triggering an error latch. 'These
circuits wcre run for times of up to 15 minutes (a cooling
limit) at various clock periods with different starting data
sets to try to gain an understanding of the error profiles.
These results arc summnarir>cd in table I and indicate a
relatively low error rate.Id4ar 1goruer CImd, m
esa rn tn "'ne .+ " P :,
P utlo iantlon OM Itirss out
Figure S. A PItrud/o-rondot hit .erquencer structure
based nn ,r shift regiscrr rrnd rxzhesite-ORfcedbrec k.
Start Patt. ock ogerr rate
..1,z11 . -12
11111... 60Gz < -2
101010.. 1 Z G { 1
Tdbte 1. Table ,chow;+ng lhe maximum~r error rase in thea
shift register for d((ferent cork jrtgquencies and starting
pattem:.
Antothar block of considerable value is thta analog to
digital converter (ADC) in which enormous resource
hAVG been expended is n mny technologieR- Many
superconduceting architectures have hetn demonstrated in
LT'S and several its 1T1S, Onc such architecture is bused
on tht unique voltage to frequency canvcrsion present !n
the Jotsephson element. if an unknown artaiog signal is
crupttd into a biacd SQUIDtt, a train of pulses will e
produced whose period is directly related to fihe signat
amplitude in a welt known way. By counting these pulses
over n stable time period, an accurtt convcrslan can be
obtained. The structure of this AUC Ruitttble for HTS
fr,}ication is shown in rig. 6. Thc counter is a structure
known as Use thetr cell rod it also belgpgs to tits family of
purse manipulation logic. An initial incident palsc
produces a circulating Curtent in the uppecr half of the cell.
The second pulse induces this current mto thie rest of fihe
cell and prudeuccs n pulse which is sent lu the adjoining
cell. Thu9 it is a true binary saunter. The center cells
ctan operate, in principle, nt speeds of several hundred
GIz And the 6th bit has been observed counting al nearly
1 GHz (suggesting the LSB is counting rt near 250
G~z). A pint of count in a 2 n,: interval for a variety of
inputs !s Shawn in Fig, 7 and illustrates at Icast basic
fuoclionailty..,m
P,4
Upcoming Pages
Here’s what’s next.
Search Inside
This article can be searched. Note: Results may vary based on the legibility of text within the document.
Tools / Downloads
Get a copy of this page or view the extracted text.
Citing and Sharing
Basic information for referencing this web page. We also provide extended guidance on usage rights, references, copying or embedding.
Reference the current page of this Article.
Martens, J. S.; Pance, A.; Whiteley, S. R.; Char, K.; Johansson, M. F.; Lee, L. et al. High temperature superconducting digital circuits and subsystems, article, October 1, 1993; Albuquerque, New Mexico. (https://digital.library.unt.edu/ark:/67531/metadc1397295/m1/5/: accessed July 16, 2024), University of North Texas Libraries, UNT Digital Library, https://digital.library.unt.edu; crediting UNT Libraries Government Documents Department.