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Investigation of hydrogen and chlorine at the SiO/sub 2//Si interface

Description: Silicon oxides thermally grown in H/sub 2/O, O/sub 2/, HCl/O/sub 2/ and Cl/sub 2//O/sub 2/ ambients were analyzed, via /sup 1/H(/sup 19/F,..cap alpha gamma..)/sup 16/O nuclear reaction and SIMS, for the presence of hydrogen. In addition, those oxides grown in HCl/O/sub 2/ and Cl/sub 2//O/sub 2/ ambients were analyzed with SIMS for the presence of chlorine. The SIMS data show that the hydrogen levels in these oxides were below the limit of detection for nuclear reaction experiments. The /sup 35/Cl/sup +/ depth-profiles show that chlorine is enriched at the SiO/sub 2/ interface for the HCl/O/sub 2/ grown oxides while it is more evenly distributed in oxide bulk in the Cl/sub 2//O/sub 2/ grown samples.
Date: January 1, 1980
Creator: Tsong, I.S.T.; Monkowski, M.D.; Monkowski, J.R.; Miller, P.D.; Moak, C.D.; Appleton, B.R. et al.
Partner: UNT Libraries Government Documents Department

Hydrogen and chlorine detection at the SiO/sub 2//Si interface

Description: Hydrogen and chlorine depth profiles were obtained on a series of silicon oxides thermally grown in HCl/O/sub 2/ and Cl/sub 2//O/sub 2/ ambients at 1100/sup 0/C for 15 minutes using the /sup 19/F nuclear reaction and SIMS techniques. The data show close correlation between the H and Cl profiles in both the HCl/O/sub 2/ and Cl/sub 2//O/sub 2/ oxides. While the H and Cl appear to be enriched at the SiO/sub 2//Si interface of the HCl/O/sub 2/ oxides, they are higher in concentration and more evenly distributed in the oxide bulk of the Cl/sub 2//O/sub 2/ oxides.
Date: January 1, 1981
Creator: Tsong, I.S.T.; Monkowski, M.D.; Monkowski, J.R.; Wintenberg, A.L.; Miller, P.D. & Moak, C.D.
Partner: UNT Libraries Government Documents Department

Ion-beam depth-profiling studies of leached glasses

Description: Ion-beam depth-profiling was carried out on three different glasses leached (or hydrated) in deionized water using /sup 1/H(/sup 19/F,..cap alpha gamma..)/sup 16/O nuclear reaction, secondary ion mass spectrometry (SIMS) and sputter-induced photon spectrometry (SIPS) techniques. The depth-profiles show an interdiffusion mechanism in which the sodium ions in the glass are depleted and replaced by hydrogen (H/sup +/) or hydronium (H/sub 3/O/sup +/) ions from the solution. The leaching behavior does not show significant difference whether the glass surface is fractured or polished. Problems of mobile ion migration caused by ion bombardment and loss of hydrogen during analysis are discussed.
Date: January 1, 1981
Creator: Houser, C.A.; Tsong, I.S.T.; White, W.B.; Wintenberg, A.L.; Miller, P.D. & Moak, C.D.
Partner: UNT Libraries Government Documents Department

Considerations on the design of front-end electronics for silicon calorimetry for the SSC (Superconducting Super Collider)

Description: Some considerations are described for the design of a silicon-based sampling calorimetry detector for the Superconducting Super Collider (SSC). The use of silicon as the detection medium allows fast, accurate, and fine-grained energy measurements -- but for optimal performance, the front-end electronics must be matched to the detector characteristics and have the speed required by the high SSC interaction rates. The relation between the signal-to-noise ratio of the calorimeter electronics and the charge collection time, the preamplifier power dissipation, detector capacitance and leakage, charge gain, and signal shaping and sampling was studied. The electrostatic transformer connection was analyzed and found to be unusable for a tightly arranged calorimeter because of stray capacitance effects. The method of deconvolutional sampling was developed as a means for pileup correction following synchronous sampling and analog storage. 3 refs., 6 figs.
Date: January 1, 1990
Creator: Wintenberg, A.L.; Bauer, M.L.; Britton, C.L. Jr.; Kennedy, E.J.; Todd, R.A. (Oak Ridge National Lab., TN (USA)); Berridge, S.C. et al.
Partner: UNT Libraries Government Documents Department

A four-channel bipolar monolithic preamplifier for RHIC dimuon pad readout

Description: This paper presents a four-channel, low power-consumption bipolar monolithic preamplifier designed to amplify signals from pads with detector capacitance values from 10 pF to 50 pF used in a RHIC (Relativistic Heavy Ion Collider) dimuon experiment. The circuit utilizes a folded-cascode topology with a novel feedforward compensation that improves the low-capacitance transient response and provides self-biasing without resorting to bandgap or current references. The circuit was fabricated by Harris Semiconductor in the VHF dielectrically isolated complementary bipolar process. Measured data for gamma irradiation to 1.25 MRad are presented. 6 refs., 7 figs., 2 tabs.
Date: January 1, 1991
Creator: Britton, C.L. Jr.; Todd, R.A.; Wintenberg, A.L.; Young, G.R. (Oak Ridge National Lab., TN (United States)) & Kennedy, E.J. (Tennessee Univ., Knoxville, TN (United States). Dept. of Electrical and Computer Engineering)
Partner: UNT Libraries Government Documents Department

WA80 BGO calorimetry electronics

Description: This paper describes instrumentation designed for BGO scintillator-based calorimetry of particles covering a very wide range of energies (from less than 50 MeV to 50 GeV). The instrumentation was designed to have a measurement accuracy of 0.1% over as much of the energy range as possible so the energy resolution of BGO would be the limiting factor. Two 1.5-cm{sup 2} photodiodes were used per 2.5 cm {times} 2.5 cm {times} 25 cm BGO crystal. Both a charge-sensitive preamplifier and a pulse processor were developed specifically for the needs of the WA80 experiment. The preamplifier was designed for high detector capacitance (100 to 700 pF), low integral and differential non-linearity and low power consumption (200 mW). The pulse processor is a time-invariant shaping amplifier with integral peak-detect-and-hold and automatic gain selection circuits. The amplifier use quasi-triangular shaping with 4 {mu}s peaking time, and the hold circuit is gated with a fast first level trigger. The system has more than 20 bits of effective resolution when used with an external 12-bit ADC. Results from beam tests at CERN are presented. 6 refs., 5 figs., 1 tab.
Date: October 31, 1991
Creator: Wintenberg, A.L.; Britton, C.L. Jr.; Ericson, M.N.; Maples, R.A.; Young, G.R. & Awes, T.C.
Partner: UNT Libraries Government Documents Department

Design and characterization of the BVX: An 8-channel CMOS preamplifier-shaper for silicon strips

Description: This paper presents the design and characterization of an 8channel preamplifier-shaper intended for use with silicon strip detectors ranging in capacitance from 1 to 20pF. The nominal peaking time of the circuit is 200ns with an adjustment range of {plus_minus}50ns. The circuit has a pitch (width) of 84{mu}channel with a power dissipation of 1.2mW/channel and has been fabricated in 2{mu}m p-well CMOS. The 0pF noise is 330e with a noise slope of 64e/pF. The design approach is presented as well as both test bench and strip detector measurements.
Date: December 31, 1992
Creator: Britton, C. L. Jr.; Alley, G. T.; Simpson, M. L.; Wintenberg, A. L.; Yarema, R. J.; Zimmerman, T. et al.
Partner: UNT Libraries Government Documents Department

Method and apparatus for providing pulse pile-up correction in charge quantizing radiation detection systems

Description: This invention is comprised of a radiation detection method and system for continuously correcting the quantization of detected charge during pulse pile-up conditions. Charge pulses from a radiation detector responsive to the energy of detected radiation events are converted to voltage pulses of predetermined shape whose peak amplitudes are proportional to the quantity of charge of each corresponding detected event by means of a charge-sensitive preamplifier. These peak amplitudes are sampled and stored sequentially in accordance with their respective times of occurrence. Based on the stored peak amplitudes and times of occurrence, a correction factor is generated which represents the fraction of a previous pulses influence on a preceding pulse peak amplitude. This correction factor is subtracted from the following pulse amplitude in a summing amplifier whose output then represents the corrected charge quantity measurement.
Date: December 31, 1992
Creator: Britton, C.L. Jr. & Wintenberg, A.L.
Partner: UNT Libraries Government Documents Department

Whole-arm obstacle avoidance system conceptual design

Description: Whole-arm obstacle avoidance is needed for a variety of robotic applications in the Environmental Restoration and Waste Management (ER WM) Program. Typical industrial applications of robotics involve well-defined workspaces, allowing a predetermined knowledge of collision-free paths for manipulator motion. In the unstructured or poorly defined hazardous environments of the ER WM Program, the potential for significant problems resulting from collisions between manipulators and the environment in which they are utilized is great. The conceptual design for a sensing system that will provide protection against such collisions is described herein. The whole-arm obstacle avoidance system consists of a set of sensor bracelets,'' which cover the surface area of the manipulator links to the maximum extent practical, and a host processor. The host processor accepts commands from the robot control system, controls the operation of the sensors, manipulates data received from the bracelets, and makes the data available to the manipulator control system. The bracelets consist of a subset of the sensors, associated sensor interface electronics, and a bracelet interface. Redundant communications links between the host processor and the bracelets are provided, allowing single-point failure protection. The system allows reporting of 8-bit data from up to 1000 sensors at a minimum of 50 Hz. While the initial prototype implementation of the system utilizes capacitance proximity sensor, the system concept allows multiple types of sensors. These sensors are uniquely addressable, allowing remote calibration, thresholding at the bracelet, and correlation of a sensor measurement with the associated sensor and its location on the manipulator. Variable resolution allows high-speed, single-bit sensing as well as lower-speed higher-resolution sensing, which is necessary for sensor calibration and potentially useful in control.
Date: April 1, 1993
Creator: Wintenberg, A.L.; Butler, P.L.; Babcock, S.M.; Ericson, M.N. & Britton, C.L. Jr.
Partner: UNT Libraries Government Documents Department

Whole-arm obstacle avoidance system conceptual design

Description: Whole-arm obstacle avoidance is needed for a variety of robotic applications in the Environmental Restoration and Waste Management (ER&WM) Program. Typical industrial applications of robotics involve well-defined workspaces, allowing a predetermined knowledge of collision-free paths for manipulator motion. In the unstructured or poorly defined hazardous environments of the ER&WM Program, the potential for significant problems resulting from collisions between manipulators and the environment in which they are utilized is great. The conceptual design for a sensing system that will provide protection against such collisions is described herein. The whole-arm obstacle avoidance system consists of a set of sensor ``bracelets,`` which cover the surface area of the manipulator links to the maximum extent practical, and a host processor. The host processor accepts commands from the robot control system, controls the operation of the sensors, manipulates data received from the bracelets, and makes the data available to the manipulator control system. The bracelets consist of a subset of the sensors, associated sensor interface electronics, and a bracelet interface. Redundant communications links between the host processor and the bracelets are provided, allowing single-point failure protection. The system allows reporting of 8-bit data from up to 1000 sensors at a minimum of 50 Hz. While the initial prototype implementation of the system utilizes capacitance proximity sensor, the system concept allows multiple types of sensors. These sensors are uniquely addressable, allowing remote calibration, thresholding at the bracelet, and correlation of a sensor measurement with the associated sensor and its location on the manipulator. Variable resolution allows high-speed, single-bit sensing as well as lower-speed higher-resolution sensing, which is necessary for sensor calibration and potentially useful in control.
Date: April 1, 1993
Creator: Wintenberg, A. L.; Butler, P. L.; Babcock, S. M.; Ericson, M. N. & Britton, C. L. Jr.
Partner: UNT Libraries Government Documents Department

Monolithic circuits for the WA98 lead glass calorimeter

Description: Two monolithic circuits developed for readout of a 10,000 element lead glass calorimeter are described. The first contains 8 channels with each channel comprising a charge integrating amplifier, two output amplifiers with gains of one and eight, a timing filter amplifier and a constant fraction discriminator. This IC also contains a maskable, triggerable calibration pulser and circuits needed to form 2 by 2 and 4 by 4 energy sums used to provide trigger signals. The second IC is a companion to the first and contains 16 analog memory channels with 16 cells each, eight time-to-amplitude converters and a 24-channel analog-to-digital converter. The use of the analog memories following the integration function eliminates the need for delay cables preceding it. Characterizations of prototypes are reported, and features included to ease integration if the ICs into a readout system are described.
Date: December 31, 1994
Creator: Wintenberg, A.L.; Awes, T.C. & Britton, C.L. Jr.
Partner: UNT Libraries Government Documents Department

A flexible analog memory address list manager/controller for PHENIX

Description: A programmable analog memory address list manager/controller has been developed for use with all analog memory-based detector subsystems of PHENIX. The unit provides simultaneous read/write control, cell write-over protection for both a Level-1 trigger decision delay and digitization latency, and re-ordering of AMU addresses following conversion, at a beam crossing rate of 112 ns. Addresses are handled such that up to 5 Level-1 events can be maintained in the AMU without write-over. Data tagging is implemented for handling overlapping and shared beam event data packets. Full usage in all PHENIX analog memory-based detector sub-systems is accomplished by the use of detector-specific programmable parameters -- the number of data samples per Level-1 trigger valid and the swnple spacing. Architectural candidates for the system are discussed with emphasis on implementation implications. Details of the design are presented including design simulations, timing information, and test results from a full implementation using programmable logic devices.
Date: June 1, 1995
Creator: Ericson, M.N.; Walker, J.W.; Britton, C.L.; Wintenberg, A.L. & Young, G.R.
Partner: UNT Libraries Government Documents Department

Post-radiation memory correction using differential subtraction for Phenix

Description: In colliders such as RHIC, the radiation levels are well below those of colliders such as LHC. The problem is that there can be enough radiation at the inner detector (Multiplicity-Vertex Detector or MVD) to significantly affect a low-priced, nonradiation-hard CMOS process. If the radiation affects the entire analog memory in a uniform fashion, then a real-time correction should be able to be performed to correct any changes seen in the memory and also the induced correlated noise from detector pickup thus precluding the need for a more expensive rad-hard process. This paper will present testing on memories fabricated in a `soft` process and exposed to ionizing radiation. We used a single pipeline as a reference to be subtracted in a cell-by-cell basis from each pipe during read out and investigated the spatial effects of using different pipes for the reference. Use of this method reduced the noise which was common to all pipes (common-mode noise) and thus reduced both common-mode input noise and pattern noise generated from address lines being exercised on the AMU. The correlation across the memories (6-, 8-, and 16-channel AMUs fabricated in the Orbit 1.2{mu} CMOS process) vs. radiation dose was found to be quite good. Both pre-and post-radiation results are presented on systems designed for PHENIX and WA98 at CERN as well as measured results on the minimization of the effects of injected systematic noise.
Date: June 1, 1995
Creator: Britton, C.L. Jr.; Wintenberg, A.L.; Womac, M.; Kennedy, E.J.; Smith, R.S.; Young, G.R. et al.
Partner: UNT Libraries Government Documents Department

Integrating amplifiers for PHENIX lead-glass and lead-scintillator calorimeters

Description: Two types of integrating amplifier systems have been developed for use with lead-glass and lead-scintillator calorimeters with photomultiplier tube readout. Requirements for the amplifier system include termination of the line from the photomultiplier, compact size and low power dissipation to allow multiple channels per chip, dual range outputs producing 10-bit accuracy over a 14-bit dynamic range, rms noise levels of one LSB or less, and compatibility with timing filter amplifiers, tower sum circuits for triggering and calibration circuits to be built on the same integrated circuit (IC). Advantages and disadvantages of an active integrator system are compared and contrasted to those of a passive integrator-based system. In addition, details of the designs and results from prototype devices including an 8-channel active integrator IC fabricated in 1.2 {micro}m Orbit CMOS are presented.
Date: December 31, 1995
Creator: Wintenberg, A.L.; Simpson, M.L.; Britton, C.L. Jr.; Palmer, R.L. & Jackson, R.G.
Partner: UNT Libraries Government Documents Department

A Radiation-Hard Analog Memory In The AVLSI-RA Process

Description: A radiation hardened analog memory for an Interpolating Pad Camber has been designed at Oak Ridge National Laboratory and fabricated by Harris Semiconductor in the AVLSI-RA CMOS process. The goal was to develop a rad-hard analog pipeline that would deliver approximately 9-bit performance, a readout settling time of 500ns following read enable, an input and output dynamic range of +/-2.25V, a corrected rms pedestal of approximately 5mV or less, and a power dissipation of less than 10mW/channel. The pre- and post-radiation measurements to 5MRad are presented.
Date: December 31, 1995
Creator: Britton, C.L. Jr.; Wintenberg, A.L.; Read, K.F.; Simpson, M.L.; Young, G.R.; Clonts, L.G., Kennedy, E.J., Smith, R.S., Swann, B.K. et al.
Partner: UNT Libraries Government Documents Department

A CMOS variable gain amplifier for PHENIX electromagnetic calorimeter and RICH energy measurements

Description: A variable gain amplifier (VGA) has been developed equalizing the gains of integrating amplifier channels used with multiple photomultiplier tubes operating from common high-voltage supplies. The PHENIX lead-scintillator electromagnetic calorimeter will operate in that manner, and gain equalization is needed to preserve the dynamic range of the analog memory and ADC following the integrating amplifier. The VGA is also needed for matching energy channel gains prior to forming analog sums for trigger purposes. The gain of the VGA is variable over a 3:1 range using a 5-bit digital control, and the risetime is held between 15 and 23 ns using switched compensation in the VGA. An additional feature is gated baseline restoration. Details of the design and results from several prototype devices fabricated in 1.2-{mu}m Orbit CMOS are presented.
Date: December 31, 1996
Creator: Wintenberg, A.L.; Simpson, M.L.; Young, G.R.; Palmer, R.L.; Moscone, C.G. & Jackson, R.G.
Partner: UNT Libraries Government Documents Department

Development of a front end controller/heap manager for PHENIX

Description: A controller/heap manager has been designed for applicability to all detector subsystem types of PHENIX. the heap manager performs all functions associated with front end electronics control including ADC and analog memory control, data collection, command interpretation and execution, and data packet forming and communication. Interfaces to the unit consist of a timing and control bus, a serial bus, a parallel data bus, and a trigger interface. The topology developed is modular so that many functional blocks are identical for a number of subsystem types. Programmability is maximized through the use of flexible modular functions and implementation using field programmable gate arrays (FPGAs). Details of unit design and functionality will be discussed with particular detail given to subsystems having analog memory-based front end electronics. In addition, mode control, serial functions, and FPGA implementation details will be presented.
Date: December 31, 1996
Creator: Ericson, M.N.; Allen, M.D.; Musrock, M.S.; Walker, J.W.; Britton, C.L. Jr.; Wintenberg, A.L. et al.
Partner: UNT Libraries Government Documents Department

Integrated constant-fraction discriminator shaping techniques for the PHENIX lead-scintillator calorimeter

Description: The suitability of several on-chip constant-fraction discriminator (CFD) shaping methods for use in the multichannel PHENIX Lead- Scintillator detector has been investigated. Three CFD circuits utilizing a distributed R-C delay-line, a lumped-element R-C delay- line and the Nowlin shaping method have been realized in a standard 1. 2-{mu} n- well CMOS process. A CFD using ideal delay-line shaping was also studied for comparison. Time walk for 5 ns risetime input signals over a dynamic range of - 2 V to - 20 mV was less than {+-} 175 ps, {+-} 150 ps, {+-} 150, and {+-} 185 ps while worst case rms timing jitter measured 85 ps, 90 ps, 100 ps, and 65 ps, respectively, for the four methods mentioned above. Area requirements for the three candidate methods tested including the fraction circuit were 172 {mu} X 70 {mu}, 160 {mu} X 65 {mu}, 179 {mu} X 53 g, respectively. The fraction circuit area for the external delay-line circuit was 67 {mu} X 65 {mu}. Each shaping method studied consumed no power from the dc supply.
Date: December 31, 1996
Creator: Jackson, R.G.; Blalock, T.V.; Simpson, M.L.; Wintenberg, A.L. & Young, G.R.
Partner: UNT Libraries Government Documents Department

A multi-channel ADC for use in the PHENIX detector

Description: A custom CMOS analog to digital converter was designed and a prototype 8-channel ADC ASIC was fabricated in a 1.2 {mu}m process. The circuit uses a Wilkinson-type architecture which is suitable for use in multi-channel applications such as the PHENIX detector. The ADC design features include a differential positive-ECL input for the high speed clock and selectable control for 11 or 12-bit conversions making it suitable for use in multiple PHENIX subsystems. Circuit topologies and ASIC layout specifics. including power consumption, maximum clock speed, INL. and DNL are discussed. The ADC performed to 11-bit accuracy.
Date: December 31, 1996
Creator: Emery, M.S.; Frank, S.S.; Britton, C.L. Jr.; Wintenberg, A.L.; Simpson, M.L.; Ericson, M.N. et al.
Partner: UNT Libraries Government Documents Department

A CMOS Integrating Amplifier for the PHENIX Ring Imaging Cherenkov detector

Description: A CMOS integrating amplifier has been developed for use in the PHENIX Ring Imaging Cherenkov (RICH) detector. The amplifier, consisting of a charge-integrating amplifier followed by a variable gain amplifier (VGA), is an element of a photon measurement system comprising a photomultiplier tube, a wideband, gain of 10 amplifier, the integrating amplifier, and an analog memory followed by an ADC and double correlated sampling implemented in software. The integrating amplifier is designed for a nominal full scale input of 160 pC with a gain of 20 mV/pC and a dynamic range of 1000:1. The VGA is used for equalizing gains prior to forming analog sums for trigger purposes. The gain of the VGA is variable over a 3:1 range using a 5 bits digital control, and the risetime is held to approximately 20 ns using switched compensation in the VGA. Details of the design and results from several prototype devices fabricated in 1.2 {micro}m Orbit CMOS are presented. A complete noise analysis of the integrating amplifier and the correlated sampling process is included as well as a comparison of calculated, simulated and measured results.
Date: November 1, 1997
Creator: Wintenberg, A.L.; Jones, J.P. Jr.; Young, G.R. & Moscone, C.G.
Partner: UNT Libraries Government Documents Department

Integrated power management for microsystems

Description: There is a need for a universal power module for microsystems. This module should provide power conditioning, energy storage, and load matching for a variety of energy sources and loads such as microelectromechanical systems (MEMS) and wireless sensors and micro-robots. There are a variety of potential ambient and human powered energy sources, which can supply some of the power needs of the military. The challenge is to capture these available sources of electrical energy and condition them to meet the voltage, current, and overall power demands of field-deployable microelectronics and MEMs-based devices such as wireless sensors and micro-robots. Most natural and man-made energy sources found in the environment have a low specific power and are not generally available on a continuous basis. Likewise, human-based energy sources must be optimally managed to meet the power needs in the field. Therefore, a power supply must have the ability to capture the available energy and store it in such a manner to be useful to meet the mission requirements of the device that is connected to the source. It must continuously monitor the status of energy stored and determine the expected demands of the device. A microelectronics-based power management chip can be developed to meet these objectives. The major challenge in realizing this concept will be the design of an intelligent power-conditioning chip that consumes a minimum of power to perform the functions of power conditioning, storage, load matching, and status monitoring. The prototype power conditioning integrated circuit would be capable of delivering a peak power of 100 mW at 5 V. The nominal operating condition would be a very low duty cycle for a relatively high power load, and a low-power source available for long periods of time, or a moderate-power source available intermittently.
Date: December 1, 1997
Creator: Fry, D.N.; Wintenberg, A.L. & Bryan, B.L.
Partner: UNT Libraries Government Documents Department

Multiple Input Microcantilever Sensor with Capacitive Readout

Description: A surface-micromachined MEMS process has been used to demonstrate multiple-input chemical sensing using selectively coated cantilever arrays. Combined hydrogen and mercury-vapor detection was achieved with a palm-sized, self-powered module with spread-spectrum telemetry reporting.
Date: March 11, 1999
Creator: Britton, C.L., Jr.; Brown, G.M.; Bryan, W.L.; Clonts, L.G.; DePriest, J.C.; Emergy, M.S. et al.
Partner: UNT Libraries Government Documents Department

Performance of Front-End Readout System for PHENIX RICH

Description: A front-end electronics system has been developed for the Ring Imaging Cerenkov (RICH) detector of the PHENIX experiment at the Relativistic Heavy Ion Collider (RHIC), Brookhaven National Laboratory (BNL). A high speed custom back-plane with source synchronous bus architecture, a full custom analog ASIC, and board modules with FPGA's and CPLD's were developed for high performance real time data acquisition. The transfer rate of the back-lane has reached 640 MB/s with 128 bits data bus. Total transaction time is estimated to be less than 30 {micro}s per event. The design specifications and test results of the system are presented in this paper.
Date: November 15, 1999
Creator: Oyama, K.; Hamagaki, H.; Nishimura, S.; Shigaki, K.; Hayano, R. S.; Hibino, M. et al.
Partner: UNT Libraries Government Documents Department