Description: Processes to fabricate dense, dry released microstructures with electrical connections on the opposite side of the wafer are described. A 10 x 10 array of silicon and polysilicon cantilevers with high packing density (5 tips/mm<sup>2</sup>) and high uniformity (<10 µm length variation across the wafer) are demonstrated. The cantilever release process uses a deep SF<sub>6</sub>/C<sub>4</sub>F<sub>8</sub>, plasma etch followed by a HBr plasma etch to accurately release cantilevers. A process for fabricating electrical contacts through the backside of the wafer is also described. Electrodeposited resist, conformal CVD metal deposition and deep SF<sub>6</sub>/C<sub>4</sub>F<sub>8</sub> plasma etching are used to make 30 µm/side square vias each of which has a resistance of 50 m(omega).
Date: November 3, 1998
Creator: A. Harley, J.; Abdollahi-Alibeik, S.; Chow, E. M.; Kenney, T. W.; McCarthy, A. M.; McVittie, J. P. et al.
Partner: UNT Libraries Government Documents Department