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Supercomputer debugging workshop 1991 proceedings

Description: This report discusses the following topics on supercomputer debugging: Distributed debugging; use interface to debugging tools and standards; debugging optimized codes; debugging parallel codes; and debugger performance and interface as analysis tools. (LSP)
Date: January 1, 1991
Creator: Brown, J.
Partner: UNT Libraries Government Documents Department

NA-NET numerical analysis net

Description: This report describes a facility called NA-NET created to allow numerical analysts (na) an easy method of communicating with one another. The main advantage of the NA-NET is uniformity of addressing. All mail is addressed to the Internet host na-net.ornl.gov'' at Oak Ridge National Laboratory. Hence, members of the NA-NET do not need to remember complicated addresses or even where a member is currently located. As long as moving members change their e-mail address in the NA-NET everything works smoothly. The NA-NET system is currently located at Oak Ridge National Laboratory. It is running on the same machine that serves netlib. Netlib is a separate facility that distributes mathematical software via electronic mail. For more information on netlib consult, or send the one-line message send index'' to netlib{at}ornl.gov. The following report describes the current NA-NET system from both a user's perspective and from an implementation perspective. Currently, there are over 2100 members in the NA-NET. An average of 110 mail messages pass through this facility daily.
Date: December 1, 1991
Creator: Dongarra, J. (Tennessee Univ., Knoxville, TN (United States). Dept. of Computer Science Oak Ridge National Lab., TN (United States)) & Rosener, B. (Tennessee Univ., Knoxville, TN (United States). Dept. of Computer Science)
Partner: UNT Libraries Government Documents Department

NA-NET numerical analysis net

Description: This report describes a facility called NA-NET created to allow numerical analysts (na) an easy method of communicating with one another. The main advantage of the NA-NET is uniformity of addressing. All mail is addressed to the Internet host ``na-net.ornl.gov`` at Oak Ridge National Laboratory. Hence, members of the NA-NET do not need to remember complicated addresses or even where a member is currently located. As long as moving members change their e-mail address in the NA-NET everything works smoothly. The NA-NET system is currently located at Oak Ridge National Laboratory. It is running on the same machine that serves netlib. Netlib is a separate facility that distributes mathematical software via electronic mail. For more information on netlib consult, or send the one-line message ``send index`` to netlib{at}ornl.gov. The following report describes the current NA-NET system from both a user`s perspective and from an implementation perspective. Currently, there are over 2100 members in the NA-NET. An average of 110 mail messages pass through this facility daily.
Date: December 1, 1991
Creator: Dongarra, J. & Rosener, B.
Partner: UNT Libraries Government Documents Department

A parallel algorithm for the non-symmetric eigenvalue problem

Description: This paper describes a parallel algorithm for computing the eigenvalues and eigenvectors of a non-symmetric matrix. The algorithm is based on a divide-and-conquer procedure and uses an iterative refinement technique.
Date: December 1, 1991
Creator: Dongarra, J. & Sidani, M. (Tennessee Univ., Knoxville, TN (United States). Dept. of Computer Science Oak Ridge National Lab., TN (United States))
Partner: UNT Libraries Government Documents Department

Supercomputer debugging workshop 1991 proceedings

Description: This report discusses the following topics on supercomputer debugging: Distributed debugging; use interface to debugging tools and standards; debugging optimized codes; debugging parallel codes; and debugger performance and interface as analysis tools. (LSP)
Date: December 31, 1991
Creator: Brown, J.
Partner: UNT Libraries Government Documents Department

Reduction to condensed form for the eigenvalue problem on distributed memory architectures

Description: In this paper, we describe a parallel implementation for the reduction of general and symmetric matrices to Hessenberg and tridiagonal form, respectively. The methods are based on LAPACK sequential codes and use a panel-wrapped mapping of matrices to nodes. Results from experiments on the Intel Touchstone Delta are given.
Date: January 1, 1992
Creator: Dongarra, J. J. & van de Geijn, R. A.
Partner: UNT Libraries Government Documents Department

Reduction to condensed form for the eigenvalue problem on distributed memory architectures

Description: In this paper, we describe a parallel implementation for the reduction of general and symmetric matrices to Hessenberg and tridiagonal form, respectively. The methods are based on LAPACK sequential codes and use a panel-wrapped mapping of matrices to nodes. Results from experiments on the Intel Touchstone Delta are given.
Date: January 1, 1992
Creator: Dongarra, J.J. (Tennessee Univ., Knoxville, TN (United States). Dept. of Computer Science Oak Ridge National Lab., TN (United States). Mathematical Sciences Section) & van de Geijn, R.A. (Texas Univ., Austin, TX (United States). Dept. of Computer Sciences)
Partner: UNT Libraries Government Documents Department

The hierarchical spatial decomposition of three-dimensional particle- in-cell plasma simulations on MIMD distributed memory multiprocessors

Description: The hierarchical spatial decomposition method is a promising approach to decomposing the particles and computational grid in parallel particle-in-cell application codes, since it is able to maintain approximate dynamic load balance while keeping communication costs low. In this paper we investigate issues in implementing a hierarchical spatial decomposition on a hypercube multiprocessor. Particular attention is focused on the communication needed to update guard ring data, and on the load balancing method. The hierarchical approach is compared with other dynamic load balancing schemes.
Date: July 1, 1992
Creator: Walker, D.W.
Partner: UNT Libraries Government Documents Department

The hierarchical spatial decomposition of three-dimensional particle- in-cell plasma simulations on MIMD distributed memory multiprocessors

Description: The hierarchical spatial decomposition method is a promising approach to decomposing the particles and computational grid in parallel particle-in-cell application codes, since it is able to maintain approximate dynamic load balance while keeping communication costs low. In this paper we investigate issues in implementing a hierarchical spatial decomposition on a hypercube multiprocessor. Particular attention is focused on the communication needed to update guard ring data, and on the load balancing method. The hierarchical approach is compared with other dynamic load balancing schemes.
Date: July 1, 1992
Creator: Walker, D. W.
Partner: UNT Libraries Government Documents Department

Speedup properties of phases in the execution profile of distributed parallel programs

Description: The execution profile of a distributed-memory parallel program specifies the number of busy processors as a function of time. Periods of homogeneous processor utilization are manifested in many execution profiles. These periods can usually be correlated with the algorithms implemented in the underlying parallel code. Three families of methods for smoothing execution profile data are presented. These approaches simplify the problem of detecting end points of periods of homogeneous utilization. These periods, called phases, are then examined in isolation, and their speedup characteristics are explored. A specific workload executed on an Intel iPSC/860 is used for validation of the techniques described.
Date: August 1, 1992
Creator: Carlson, B. M.; Wagner, T. D.; Dowdy, L. W. & Worley, P. H.
Partner: UNT Libraries Government Documents Department

Speedup properties of phases in the execution profile of distributed parallel programs

Description: The execution profile of a distributed-memory parallel program specifies the number of busy processors as a function of time. Periods of homogeneous processor utilization are manifested in many execution profiles. These periods can usually be correlated with the algorithms implemented in the underlying parallel code. Three families of methods for smoothing execution profile data are presented. These approaches simplify the problem of detecting end points of periods of homogeneous utilization. These periods, called phases, are then examined in isolation, and their speedup characteristics are explored. A specific workload executed on an Intel iPSC/860 is used for validation of the techniques described.
Date: August 1, 1992
Creator: Carlson, B. M. (Toronto Univ., ON (Canada). Computer Systems Research Institute); Wagner, T. D.; Dowdy, L. W. (Vanderbilt Univ., Nashville, TN (United States). Dept. of Computer Science) & Worley, P. H. (Oak Ridge National Lab., TN (United States))
Partner: UNT Libraries Government Documents Department

A new PICL trace file format

Description: A trace file format is described that will be used in future releases of the Portable Instrumented Communication Library (PICL) and ParaGraph. The new format provides improved support for tracing and profiling PICL communication primitives and user-defined events. The new format is also easily extended and may be useful in other instrumentation packages and performance visualization tools.
Date: October 1, 1992
Creator: Worley, P. H.
Partner: UNT Libraries Government Documents Department

A new PICL trace file format

Description: A trace file format is described that will be used in future releases of the Portable Instrumented Communication Library (PICL) and ParaGraph. The new format provides improved support for tracing and profiling PICL communication primitives and user-defined events. The new format is also easily extended and may be useful in other instrumentation packages and performance visualization tools.
Date: October 1, 1992
Creator: Worley, P. H.
Partner: UNT Libraries Government Documents Department

The KSR1: Experimentation and modeling of poststore

Description: Kendall Square Research introduced the KSR1 system in 1991. The architecture is based on a ring of rings of 64-bit microprocessors. It is a distributed, shared memory system and is scalable. The memory structure is unique and is the key to understanding the system. Different levels of caching eliminates physical memory addressing and leads to the ALLCACHE[trademark] scheme. Since requested data may be found in any of several caches, the initial access time is variable. Once pulled into the local (sub)cache, subsequent access times are fixed and minimal. Thus, the KSR1 is a Cache-Only Memory Architecture (COMA) system.This paper describes experimentation and an analytic model of the KSR1. The focus is on the poststore programmer option. With the poststore option, the programmer can elect to broadcast the updated value of a variable to all processors that might have a copy. This may save time for threads on other processors, but delays the broadcasting thread and places additional traffic on the ring. The specific issue addressed is to determine under what conditions poststore is beneficial. The analytic model and the experimental observations are in good agreement. They indicate that the decision to use poststore depends both on the application and the current system load.
Date: February 1, 1993
Creator: Rosti, E. (Milan Univ. (Italy). Dipt. di Scienze dell'Informazione); Smirni, E.; Wagner, T.D.; Apon, A.W. & Dowdy, L.W. (Vanderbilt Univ., Nashville, TN (United States). Dept. of Computer Science)
Partner: UNT Libraries Government Documents Department

The KSR1: Experimentation and modeling of poststore

Description: Kendall Square Research introduced the KSR1 system in 1991. The architecture is based on a ring of rings of 64-bit microprocessors. It is a distributed, shared memory system and is scalable. The memory structure is unique and is the key to understanding the system. Different levels of caching eliminates physical memory addressing and leads to the ALLCACHE{trademark} scheme. Since requested data may be found in any of several caches, the initial access time is variable. Once pulled into the local (sub)cache, subsequent access times are fixed and minimal. Thus, the KSR1 is a Cache-Only Memory Architecture (COMA) system.This paper describes experimentation and an analytic model of the KSR1. The focus is on the poststore programmer option. With the poststore option, the programmer can elect to broadcast the updated value of a variable to all processors that might have a copy. This may save time for threads on other processors, but delays the broadcasting thread and places additional traffic on the ring. The specific issue addressed is to determine under what conditions poststore is beneficial. The analytic model and the experimental observations are in good agreement. They indicate that the decision to use poststore depends both on the application and the current system load.
Date: February 1, 1993
Creator: Rosti, E.; Smirni, E.; Wagner, T. D.; Apon, A. W. & Dowdy, L. W.
Partner: UNT Libraries Government Documents Department

Engineering Physics and Mathematics Division progress report for period ending December 31, 1992

Description: In this report, our research is described through abstracts of journal articles, technical reports, and presentations organized into sections following the five major operating units in the division: Mathematical Sciences, Intelligent Systems, Nuclear Data and Measurement Analysis, Nuclear Analysis and Shielding, and the Engineering Physics Information Centers. Each section begins with an introduction highlighting honors, awards, and significant research accomplishments in that unit during the reporting period.
Date: May 1, 1993
Creator: Ward, R.C.
Partner: UNT Libraries Government Documents Department

Engineering Physics and Mathematics Division progress report for period ending December 31, 1992

Description: In this report, our research is described through abstracts of journal articles, technical reports, and presentations organized into sections following the five major operating units in the division: Mathematical Sciences, Intelligent Systems, Nuclear Data and Measurement Analysis, Nuclear Analysis and Shielding, and the Engineering Physics Information Centers. Each section begins with an introduction highlighting honors, awards, and significant research accomplishments in that unit during the reporting period.
Date: May 1, 1993
Creator: Ward, R. C.
Partner: UNT Libraries Government Documents Department

Privacy and Security Research Group workshop on network and distributed system security: Proceedings

Description: This report contains papers on the following topics: NREN Security Issues: Policies and Technologies; Layer Wars: Protect the Internet with Network Layer Security; Electronic Commission Management; Workflow 2000 - Electronic Document Authorization in Practice; Security Issues of a UNIX PEM Implementation; Implementing Privacy Enhanced Mail on VMS; Distributed Public Key Certificate Management; Protecting the Integrity of Privacy-enhanced Electronic Mail; Practical Authorization in Large Heterogeneous Distributed Systems; Security Issues in the Truffles File System; Issues surrounding the use of Cryptographic Algorithms and Smart Card Applications; Smart Card Augmentation of Kerberos; and An Overview of the Advanced Smart Card Access Control System. Selected papers were processed separately for inclusion in the Energy Science and Technology Database.
Date: May 1, 1993
Partner: UNT Libraries Government Documents Department

Theory, modeling, and simulation annual report, 1992

Description: This report briefly discusses research on the following topics: development of electronic structure methods; modeling molecular processes in clusters; modeling molecular processes in solution; modeling molecular processes in separations chemistry; modeling interfacial molecular processes; modeling molecular processes in the atmosphere; methods for periodic calculations on solids; chemistry and physics of minerals; graphical user interfaces for computational chemistry codes; visualization and analysis of molecular simulations; integrated computational chemistry environment; and benchmark computations.
Date: May 1, 1993
Partner: UNT Libraries Government Documents Department

Robot navigation in unknown terrains: Introductory survey of non-heuristic algorithms

Description: A formal framework for navigating a robot in a geometric terrain by an unknown set of obstacles is considered. Here the terrain model is not a priori known, but the robot is equipped with a sensor system (vision or touch) employed for the purpose of navigation. The focus is restricted to the non-heuristic algorithms which can be theoretically shown to be correct within a given framework of models for the robot, terrain and sensor system. These formulations, although abstract and simplified compared to real-life scenarios, provide foundations for practical systems by highlighting the underlying critical issues. First, the authors consider the algorithms that are shown to navigate correctly without much consideration given to the performance parameters such as distance traversed, etc. Second, they consider non-heuristic algorithms that guarantee bounds on the distance traversed or the ratio of the distance traversed to the shortest path length (computed if the terrain model is known). Then they consider the navigation of robots with very limited computational capabilities such as finite automata, etc.
Date: July 1, 1993
Creator: Rao, N. S. V.; Kareti, S.; Shi, Weimin & Iyengar, S. S.
Partner: UNT Libraries Government Documents Department

Measuring the effects of thread placement on the Kendall Square KSR1

Description: This paper describes a measurement study of the effects of thread placement on memory access times on the Kendall Square multiprocessor, the KSR1. The KSR1 uses a conventional shared memory programming model in a distributed memory architecture. The architecture is based on a ring of rings of 64-bit superscalar microprocessors. The KSR1 has a Cache-Only Memory Architecture (COMA). Memory consists of the local cache memories attached to each processor. Whenever an address is accessed, the data item is automatically copied to the local cache memory module, so that access times for subsequent references will be minimal. Experiments run on the KSR1 across a wide variety of thread configurations show that shared memory access is accelerated through strategic placement of threads which share data. The results indicate strategies for improving the performance of applications programs, and illustrate that KSR1 memory access times can remain nearly constant even when the number of participating threads increases.
Date: August 1, 1993
Creator: Wagner, T. D.; Smirni, E.; Apon, A. W.; Madhukar, M. & Dowdy, L. W.
Partner: UNT Libraries Government Documents Department

A sharp upper bound for departure from normality

Description: The departure from normality of a matrix is a real scalar that is impractical to compute if a matrix is large and its eigenvalues are unknown. A simple formula is presented for computing an upper bound for departure from normality in the Frobenius norm. This new upper bound is cheaper to compute than the upper bound derived by Henrici. Moreover, the new bound is sharp for Hermitian matrices, skew-Hermitian matrices and, in general, any matrix with eigenvalues that are horizontally or vertically aligned in the complex plane. In terms of applications, the new bound can be used in computing bounds for the spectral norm of matrix functions or bounds for the sensitivity of eigenvalues to matrix perturbations.
Date: August 1, 1993
Creator: Lee, S. L.
Partner: UNT Libraries Government Documents Department

Analyzing PICL trace data with MEDEA

Description: Execution traces and performance statistics can be collected for parallel applications on a variety of multiprocessor platforms by using the Portable Instrumented Communication Library (PICL). The static and dynamic performance characteristics of performance data can be analyzed easily and effectively with the facilities provided within the MEasurements Description Evaluation and Analysis tool (MEDEA). This report describes the integration of the PICL trace file format into MEDEA. A case study is then outlined that uses PICL and MEDEA to characterize the performance of a parallel benchmark code executed on different hardware platforms and using different parallel algorithms and communication protocols.
Date: November 1, 1993
Creator: Merlo, A. P. & Worley, P. H.
Partner: UNT Libraries Government Documents Department