5 Matching Results

Search Results

Advanced search parameters have been applied.

Multiresolution Signal Cross-correlation

Description: Signal Correlation is a digital signal processing technique which has a wide variety of applications, ranging from geophysical exploration to acoustic signal enhancements, or beamforming. This dissertation will consider this technique in an underwater acoustics perspective, but the algorithms illustrated here can be readily applied to other areas. Although beamforming techniques have been studied for the past fifty years, modern beamforming systems still have difficulty in operating in noisy environments, especially in shallow water.
Date: December 1994
Creator: Novaes, Marcos (Marcos Nogueira)
Partner: UNT Libraries

Automated infrasound signal detection algorithms implemented in MatSeis - Infra Tool.

Description: MatSeis's infrasound analysis tool, Infra Tool, uses frequency slowness processing to deconstruct the array data into three outputs per processing step: correlation, azimuth and slowness. Until now, an experienced analyst trained to recognize a pattern observed in outputs from signal processing manually accomplished infrasound signal detection. Our goal was to automate the process of infrasound signal detection. The critical aspect of infrasound signal detection is to identify consecutive processing steps where the azimuth is constant (flat) while the time-lag correlation of the windowed waveform is above background value. These two statements describe the arrival of a correlated set of wavefronts at an array. The Hough Transform and Inverse Slope methods are used to determine the representative slope for a specified number of azimuth data points. The representative slope is then used in conjunction with associated correlation value and azimuth data variance to determine if and when an infrasound signal was detected. A format for an infrasound signal detection output file is also proposed. The detection output file will list the processed array element names, followed by detection characteristics for each method. Each detection is supplied with a listing of frequency slowness processing characteristics: human time (YYYY/MM/DD HH:MM:SS.SSS), epochal time, correlation, fstat, azimuth (deg) and trace velocity (km/s). As an example, a ground truth event was processed using the four-element DLIAR infrasound array located in New Mexico. The event is known as the Watusi chemical explosion, which occurred on 2002/09/28 at 21:25:17 with an explosive yield of 38,000 lb TNT equivalent. Knowing the source and array location, the array-to-event distance was computed to be approximately 890 km. This test determined the station-to-event azimuth (281.8 and 282.1 degrees) to within 1.6 and 1.4 degrees for the Inverse Slope and Hough Transform detection algorithms, respectively, and the detection window closely correlated to the ...
Date: July 1, 2004
Creator: Hart, Darren
Partner: UNT Libraries Government Documents Department

Implementation of Turbo Codes on GNU Radio

Description: This thesis investigates the design and implementation of turbo codes over the GNU radio. The turbo codes is a class of iterative channel codes which demonstrates strong capability for error correction. A software defined radio (SDR) is a communication system which can implement different modulation schemes and tune to any frequency band by means of software that can control the programmable hardware. SDR utilizes the general purpose computer to perform certain signal processing techniques. We implement a turbo coding system using the Universal Software Radio Peripheral (USRP), a widely used SDR platform from Ettus. Detail configuration and performance comparison are also provided in this research.
Date: December 2010
Creator: Talasila, Mahendra
Partner: UNT Libraries

Timing and Congestion Driven Algorithms for FPGA Placement

Description: Placement is one of the most important steps in physical design for VLSI circuits. For field programmable gate arrays (FPGAs), the placement step determines the location of each logic block. I present novel timing and congestion driven placement algorithms for FPGAs with minimal runtime overhead. By predicting the post-routing timing-critical edges and estimating congestion accurately, this algorithm is able to simultaneously reduce the critical path delay and the minimum number of routing tracks. The core of the algorithm consists of a criticality-history record of connection edges and a congestion map. This approach is applied to the 20 largest Microelectronics Center of North Carolina (MCNC) benchmark circuits. Experimental results show that compared with the state-of-the-art FPGA place and route package, the Versatile Place and Route (VPR) suite, this algorithm yields an average of 8.1% reduction (maximum 30.5%) in the critical path delay and 5% reduction in channel width. Meanwhile, the average runtime of the algorithm is only 2.3X as of VPR.
Date: December 2006
Creator: Zhuo, Yue
Partner: UNT Libraries

Design and Optimization of Components in a 45nm CMOS Phase Locked Loop

Description: A novel scheme of optimizing the individual components of a phase locked loop (PLL) which is used for stable clock generation and synchronization of signals is considered in this work. Verilog-A is used for the high level system design of the main components of the PLL, followed by the individual component wise optimization. The design of experiments (DOE) approach to optimize the analog, 45nm voltage controlled oscillator (VCO) is presented. Also a mixed signal analysis using the analog and digital Verilog behavior of components is studied. Overall a high level system design of a PLL, a systematic optimization of each of its components, and an analog and mixed signal behavioral design approach have been implemented using cadence custom IC design tools.
Access: This item is restricted to UNT Community Members. Login required if off-campus.
Date: December 2006
Creator: Sarivisetti, Gayathri
Partner: UNT Libraries