629 Matching Results

Search Results

Advanced search parameters have been applied.

Conveyorized Photoresist Stripping Replacement for Flex Circuit Fabrication

Description: A replacement conveyorized photoresist stripping system was characterized to replace the ASI photoresist stripping system. This system uses the qualified ADF-25c chemistry for the fabrication of flex circuits, while the ASI uses the qualified potassium hydroxide chemistry. The stripping process removes photoresist, which is used to protect the copper traces being formed during the etch process.
Date: February 24, 2009
Creator: Donahue, Megan
Partner: UNT Libraries Government Documents Department

Development of lead-free solders for hybrid microcircuits

Description: Extensive work has been conducted by industry to develop lead-free solders for electronics applications. The driving force behind this effort is pressure to ban or tax the use of lead-bearing solders. There has been further interest to reduce the use of hazardous chemical cleaners. Lead-free soldering and low-residue, ``no clean`` assembly processing are being considered as solutions to these environmental issues. Most of the work has been directed toward commercial and military printed wiring board (PWB) technology, although similar problems confront the hybrid microcircuit (HMC) industry, where the development of lead-free HMC solders is generally lagging. Sandia National Laboratories is responsible for designing a variety of critical, high reliability hybrid components for radars. Sandia has consequently initiated a project, as part of its Environmentally Conscious Manufacturing program, to develop low-residue, lead-free soldering for HMCs. This paper discusses the progress of that work.
Date: January 1, 1996
Creator: Hosking, F.M.; Vianco, P.T.; Frear, D.R. & Robinson, D.G.
Partner: UNT Libraries Government Documents Department

Challenges in the Packaging of MEMS

Description: The packaging of Micro-Electro-Mechanical Systems (MEMS) is a field of great importance to anyone using or manufacturing sensors, consumer products, or military applications. Currently much work has been done in the design and fabrication of MEMS devices but insufficient research and few publications have been completed on the packaging of these devices. This is despite the fact that packaging is a very large percentage of the total cost of MEMS devices. The main difference between IC packaging and MEMS packaging is that MEMS packaging is almost always application specific and greatly affected by its environment and packaging techniques such as die handling, die attach processes, and lid sealing. Many of these aspects are directly related to the materials used in the packaging processes. MEMS devices that are functional in wafer form can be rendered inoperable after packaging. MEMS dies must be handled only from the chip sides so features on the top surface are not damaged. This eliminates most current die pick-and-place fixtures. Die attach materials are key to MEMS packaging. Using hard die attach solders can create high stresses in the MEMS devices, which can affect their operation greatly. Low-stress epoxies can be high-outgassing, which can also affect device performance. Also, a low modulus die attach can allow the die to move during ultrasonic wirebonding resulting to low wirebond strength. Another source of residual stress is the lid sealing process. Most MEMS based sensors and devices require a hermetically sealed package. This can be done by parallel seam welding the package lid, but at the cost of further induced stress on the die. Another issue of MEMS packaging is the media compatibility of the packaged device. MEMS unlike ICS often interface with their environment, which could be high pressure or corrosive. The main conclusion we can draw about MEMS ...
Date: March 26, 1999
Creator: Malshe, A.P.; Singh, S.B.; Eaton, W.P.; O'Neal, C.; Brown, W.D. & Miller, W.M.
Partner: UNT Libraries Government Documents Department

Final Report: Free Standing Quantum Wells, August 15, 1996 - May 31, 1999

Description: Recent advances in microfabrication techniques in conjunction with the precise growth of layers of single crystalline materials by epitaxial growth techniques allow the creation of new electro-optic microstructures. We have selectively etched compositionally modulated 111-v heterostructures to produce quantum wells (QW's) which are confined on both sides by air or vacuum. The material is patterned so to have the QW's suspended horizontally between vertical support posts. This structure is ideal for probing the local properties of solids, e.g., the interaction of quantum confined states with surface or interface states.
Date: October 11, 1999
Creator: Williams, M.D.; Lee, H.W.H. & Collins, J.
Partner: UNT Libraries Government Documents Department

Meso-scale machining capabilities and issues

Description: Meso-scale manufacturing processes are bridging the gap between silicon-based MEMS processes and conventional miniature machining. These processes can fabricate two and three-dimensional parts having micron size features in traditional materials such as stainless steels, rare earth magnets, ceramics, and glass. Meso-scale processes that are currently available include, focused ion beam sputtering, micro-milling, micro-turning, excimer laser ablation, femto-second laser ablation, and micro electro discharge machining. These meso-scale processes employ subtractive machining technologies (i.e., material removal), unlike LIGA, which is an additive meso-scale process. Meso-scale processes have different material capabilities and machining performance specifications. Machining performance specifications of interest include minimum feature size, feature tolerance, feature location accuracy, surface finish, and material removal rate. Sandia National Laboratories is developing meso-scale electro-mechanical components, which require meso-scale parts that move relative to one another. The meso-scale parts fabricated by subtractive meso-scale manufacturing processes have unique tribology issues because of the variety of materials and the surface conditions produced by the different meso-scale manufacturing processes.
Date: May 15, 2000
Partner: UNT Libraries Government Documents Department

MEMS Packaging - Current Issues and Approaches

Description: The assembly and packaging of MEMS (Microelectromechanical Systems) devices raise a number of issues over and above those normally associated with the assembly of standard microelectronic circuits. MEMS components include a variety of sensors, microengines, optical components, and other devices. They often have exposed mechanical structures which during assembly require particulate control, space in the package, non-contact handling procedures, low-stress die attach, precision die placement, unique process schedules, hermetic sealing in controlled environments (including vacuum), and other special constraints. These constraints force changes in the techniques used to separate die on a wafer, in the types of packages which can be used in the assembly processes and materials, and in the sealing environment and process. This paper discusses a number of these issues and provides information on approaches being taken or proposed to address them.
Date: January 19, 2000
Partner: UNT Libraries Government Documents Department

The Impact of Emerging MEMS-Based Microsystems on US Defense Applications

Description: This paper examines the impact of inserting Micro-Electro-Mechanical Systems (MEMS) into US defense applications. As specific examples, the impacts of micro Inertial Measurement Units (IMUs), radio frequency MEMS (RF MEMS), and Micro-Opto-Electro-Mechanical Systems (MOEMS) to provide integrated intelligence, communication, and control to the defense infrastructure with increased affordability, functionality, and performance are highlighted.
Date: January 20, 2000
Partner: UNT Libraries Government Documents Department

Intelligent Microsystems: Keys to the Next Silicon Revolution

Description: Paul McWhorter, Deputy Director for of the Microsystems Center at Sandia National Laboratories, discusses the potential of surface micromachining. A vision of the possibilities of intelligent Microsystems for the future is presented along with descriptions of several possible applications. Applications that are just around the corner and some that maybe quite a ways down the road but have a clear development path to their realization. Microsystems will drive the next silicon revolution.
Date: October 20, 1999
Partner: UNT Libraries Government Documents Department

Infrastructure, Technology and Applications of Micro-Electro-Mechanical Systems (MEMS)

Description: A review is made of the infrastructure, technology and capabilities of Sandia National Laboratories for the development of micromechanical systems. By incorporating advanced fabrication processes, such as chemical mechanical polishing, and several mechanical polysilicon levels, the range of micromechanical systems that can be fabricated in these technologies is virtually limitless. Representative applications include a micro-engine driven mirror, and a micromachined lock. Using a novel integrated MEMS/CMOS technology, a six degree-of-freedom accelerometer/gyroscope system has been designed by researchers at U.C. Berkeley and fabricated on the same silicon chip as the CMOS control circuits to produce an integrated micro-navigational unit.
Date: July 9, 1999
Creator: Allen, J.J.; Jakubczak, J.F.; Krygowski, T.W.; Miller, S.L.; Montague, S.; Rodgers, M.S. et al.
Partner: UNT Libraries Government Documents Department


Description: The design of a Prototype monolithic active pixel matrix, designed in a 0.15 {micro}m CMOS SOI Process, is presented. The process allowed connection between the electronics and the silicon volume under the layer of buried oxide (BOX). The small size vias traversing through the BOX and implantation of small p-type islands in the n-type bulk result in a monolithic imager. During the acquisition time, all pixels register individual radiation events incrementing the counters. The counting rate is up to 1 MHz per pixel. The contents of counters are shifted out during the readout phase. The designed prototype is an array of 64 x 64 pixels and the pixel size is 26 x 26 {micro}m{sup 2}.
Date: June 7, 2007
Creator: DUPTUCH,G. & YAREMA, R.
Partner: UNT Libraries Government Documents Department

The Sandia MEMS passive shock sensor : FY07 maturation activities.

Description: This report describes activities conducted in FY07 to mature the MEMS passive shock sensor. The first chapter of the report provides motivation and background on activities that are described in detail in later chapters. The second chapter discusses concepts that are important for integrating the MEMS passive shock sensor into a system. Following these two introductory chapters, the report details modeling and design efforts, packaging, failure analysis and testing and validation. At the end of FY07, the MEMS passive shock sensor was at TRL 4.
Date: August 1, 2008
Creator: Houston, Jack E.; Blecke, Jill; Mitchell, John Anthony; Wittwer, Jonathan W.; Crowson, Douglas A.; Clemens, Rebecca C. et al.
Partner: UNT Libraries Government Documents Department

The Sandia MEMS Passive Shock Sensor : dormancy and aging.

Description: This report presents the results of an aging experiment that was established in FY09 and completed in FY10 for the Sandia MEMS Passive Shock Sensor. A total of 37 packages were aged at different temperatures and times, and were then tested after aging to determine functionality. Aging temperatures were selected at 100 C and 150 C, with times ranging from as short as 100 hours to as long as 1 year to simulate a predicted aging of up to 20 years. In all of the tests and controls, 100% of the devices continued to function normally.
Date: December 1, 2010
Creator: Baker, Michael Sean & Tanner, Danelle Mary
Partner: UNT Libraries Government Documents Department

Predicting fracture in micron-scale polycrystalline silicon MEMS structures.

Description: Designing reliable MEMS structures presents numerous challenges. Polycrystalline silicon fractures in a brittle manner with considerable variability in measured strength. Furthermore, it is not clear how to use a measured tensile strength distribution to predict the strength of a complex MEMS structure. To address such issues, two recently developed high throughput MEMS tensile test techniques have been used to measure strength distribution tails. The measured tensile strength distributions enable the definition of a threshold strength as well as an inferred maximum flaw size. The nature of strength-controlling flaws has been identified and sources of the observed variation in strength investigated. A double edge-notched specimen geometry was also tested to study the effect of a severe, micron-scale stress concentration on the measured strength distribution. Strength-based, Weibull-based, and fracture mechanics-based failure analyses were performed and compared with the experimental results.
Date: September 1, 2010
Creator: Hazra, Siddharth S. (Carnegie Mellon University, Pittsburgh, PA); de Boer, Maarten Pieter (Carnegie Mellon University, Pittsburgh, PA); Boyce, Brad Lee; Ohlhausen, James Anthony; Foulk, James W., III & Reedy, Earl David, Jr.
Partner: UNT Libraries Government Documents Department

Latch-up control in CMOS integrated circuits

Description: The potential for latch-up, a pnpn self-sustaining low impedance state, is inherent in standard bulk CMOS-integrated circuit structures. Under normal bias, the parasitic SCR is in its blocking state but, if subjected to a large voltage spike or if exposed to an ionizing environment, triggering may occur. This may result in device burn-out or loss of state. The problem has been extensively studied for space and weapons applications. Prevention of latch-up has been achieved in conservative design (approx. 9 ..mu..m p-well depths) by the use of minority lifetime control methods such as gold doping and neutron irradiation and by modifying the base transport factor with buried layers. The push toward VLSI densities will enhance parasitic action sufficiently so that the problem will become of more universal concern. The paper will surveys latch-up control methods presently employed for weapons and space applications on present (approx. 9 ..mu..m p-well) CMOS and indicates the extent of their applicability to VLSI designs.
Date: July 13, 1979
Creator: Ochoa, A.; Dawes, W.; Estreich, D. & Packard, H.
Partner: UNT Libraries Government Documents Department

Laser tabbed die: A repairable, high-speed die-interconnection technology. 1994 LDRD final report 93-SR-089

Description: A unique technology for multichip module production is presented. The technology, called Laser Tabbed Die (L-TAB), consists of a method for forming surface-mount-type {open_quotes}gull wing{close_quotes} interconnects on bare dice. The dice are temporarily bonded to a sacrificial substrate which has a polymer thin film coated onto it. The gull wings are formed on the side of the die with a direct-write laser patterning process which allows vertical as well as horizontal image formation. Using the laser patterning system, trenches are formed in a positive electrodeposited photoresist (EDPR) which is plated onto a metal seed layer, allowing copper to be electroplated through the resultant mask. After stripping the resist and the metal seed layer, the polymer film on the substrate is dissolved, releasing the chip with the {open_quotes}gull wings{close_quotes} intact. The chips are then bonded onto a circuit board or permanent substrate with solder or conductive adhesive.
Date: September 1, 1995
Creator: Malba, V. & Bernhardt, A.F.
Partner: UNT Libraries Government Documents Department

Microelectronics plastic molded packaging

Description: The use of commercial off-the-shelf (COTS) microelectronics for nuclear weapon applications will soon be reality rather than hearsay. The use of COTS for new technologies for uniquely military applications is being driven by the so-called Perry Initiative that requires the U.S. Department of Defense (DoD) to accept and utilize commercial standards for procurement of military systems. Based on this philosophy, coupled with several practical considerations, new weapons systems as well as future upgrades will contain plastic encapsulated microelectronics. However, a conservative Department of Energy (DOE) approach requires lifetime predictive models. Thus, the focus of the current project is on accelerated testing to advance current aging models as well as on the development of the methodology to be used during WR qualification of plastic encapsulated microelectronics. An additional focal point involves achieving awareness of commercial capabilities, materials, and processes. One of the major outcomes of the project has been the definition of proper techniques for handling and evaluation of modern surface mount parts which might be used in future systems. This program is also raising the familiarity level of plastic within the weapons complex, allowing subsystem design rules accommodating COTS to evolve. A two year program plan is presented along with test results and commercial interactions during this first year.
Date: February 1, 1997
Creator: Johnson, D.R.; Palmer, D.W. & Peterson, D.W.
Partner: UNT Libraries Government Documents Department

Modeling and Simulation of Microelectrode-Retina Interactions

Description: The goal of the retinal prosthesis project is the development of an implantable microelectrode array that can be used to supply visually-driven electrical input to cells in the retina, bypassing nonfunctional rod and cone cells, thereby restoring vision to blind individuals. This goal will be achieved through the study of the fundamentals of electrical engineering, vision research, and biomedical engineering with the aim of acquiring the knowledge needed to engineer a high-density microelectrode-tissue hybrid sensor that will restore vision to millions of blind persons. The modeling and simulation task within this project is intended to address the question how best to stimulate, and communicate with, cells in the retina using implanted microelectrodes.
Date: November 30, 2002
Creator: Beckerman, M
Partner: UNT Libraries Government Documents Department

Molecular Dynamics Simulation of Polymer Dissolution

Description: In the LIGA process for manufacturing microcomponents, a polymer film is exposed to an x-ray beam passed through a gold pattern. This is followed by the development stage, in which a selective solvent is used to remove the exposed polymer, reproducing the gold pattern in the polymer film. Development is essentially polymer dissolution, a physical process which is not well understood. We have used coarse-grained molecular dynamics simulation to study the early stage of polymer dissolution. In each simulation a film of non-glassy polymer was brought into contact with a layer of solvent. The mutual penetration of the two phases was tracked as a function of time. Several film thicknesses and two different chain lengths were simulated. In all cases, the penetration process conformed to ideal Fickian diffusion. We did not see the formation of a gel layer or other non-ideal effects. Variations in the Fickian diffusivities appeared to be caused primarily by differences in the bulk polymer film density.
Date: February 1, 2003
Partner: UNT Libraries Government Documents Department

Deep x-ray lithography based processing for micromechanics

Description: Deep x-ray lithography based fabrication provides a means to fabricate microactuators with useful output forces. High energy x-ray exposure provides a tool for fabrication of the next generation of precision engineered components. Device characterization, materials science, an metrology continue to pose challenges at this scale.
Date: October 1995
Creator: Christenson, T. R.
Partner: UNT Libraries Government Documents Department

Micro-machined heat pipes in silicon MCM substrates

Description: Multichip modules (MCMs) containing power components need a substrate with excellent heat spreading capability to both avoid hot spots and to move dissipation heat toward the system heat sinks. Polycrystalline diamond is an excellent MCM heat spreading substrate but remains several orders of magnitude too expensive and somewhat more difficult to process than conventional mother-board materials. Today`s power MCMs concentrate on moderately priced silicon wafers and aluminum nitride ceramic with their improved thermal conductivity and good thermal expansion match to power semiconductor components in comparison to traditional alumina and printed wiring board materials. However, even silicon and AlN substrates are thermally challenged by designers needs. The authors report on the integral fabrication of micro-heat pipes embedded in silicon MCM substrates (5 x 5 cm) by the use of micromachined capillary wick structures and hermetic micro-cavities. This passive microstructure results in more than a 5 times improvement in heat spreading capability of the silicon MCM substrate over a large range of power densities and operating temperatures. Thus diamond-like cooling is possible at silicon prices.
Date: January 1, 1997
Creator: Benson, D.A.; Mitchell, R.T. & Tuck, M.R.
Partner: UNT Libraries Government Documents Department