Description: Using Verilog HDL and Synopsys, the digital signal processing of the AGS Transverse Damper was designed and fitted to an Altera Flex l0k FPGA. Using a control point specification style in the high level description greatly simplified the design by placing the burden of specifying the controller on the digital synthesizer. The basic design and low level simulation are presented as well as the design methodology. The purpose of the AGS Transverse Damper is to control instabilities and injection errors that may arise in high intensity proton beams being accelerated in the AGS. The system block diagram for the DSP is shown in Figure 1. The inputs to the system come from a normalization unit. This normalization unit takes two signals as input, a sum of beam position signal plates, and a difference from the plates. The output of the normalization unit is the difference divided by the sum. This Quotient is sent to the first ALU (as Qin[11..0]). Taking differences between position measurements the system acts as a notch filter. The Second ALU computes a running sum of the output of the first ALU. This then acts to remove any offsets in the Quotient (and thus this part acts as a high pass filter - removing any baseline components to the signal). The depth of the first FIFO (between adder and subtract units) basically determines the low pass behaviour. The multiplier serves the purpose of overall loop gain for the system (the complete system is a real-time feedback system). The FIFO on the output is used to provide the correct amount of delay for the system.
Date: July 1, 1997
Creator: Brown, K.A.; Smith, G. & Wong, V.
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