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Radiation Effects in the Space Telecommunications Environment

Description: Trapped protons and electrons in the Earth's radiation belts and cosmic rays present significant challenges for electronics that must operate reliably in the natural space environment. Single event effects (SEE) can lead to sudden device or system failure, and total dose effects can reduce the lifetime of a telecommmiications system with significant space assets. One of the greatest sources of uncertainty in developing radiation requirements for a space system is accounting for the small but finite probability that the system will be exposed to a massive solar particle event. Once specifications are decided, standard laboratory tests are available to predict the total dose response of MOS and bipolar components in space, but SEE testing of components can be more challenging. Prospects are discussed for device modeling and for the use of standard commercial electronics in space.
Date: May 17, 1999
Creator: Fleetwood, Daniel M. & Winokur, Peter S.
Partner: UNT Libraries Government Documents Department

Electrical breakdown in thin oxides during bias-temperature ramps

Description: Electrical breakdown in thin oxides is assessed by a new bias-temperature ramp technique. No significant effect of radiation exposure on breakdown is observed for high quality thermal and nitrided oxides, up to 20 Mrad(SiO{sub 2}).
Date: February 8, 2000
Creator: FLEETWOOD,D.M.; RIEWE,LEONARD CHARLES; WINOKUR,PETER S. & SEXTON,FREDERICK W.
Partner: UNT Libraries Government Documents Department

Charge separation technique for metal-oxide-silicon capacitors in the presence of hydrogen deactivated dopants

Description: An improved charge separation technique for metal-oxide-silicon (MOS) capacitors is presented which accounts for the deactivation of substrate dopants by hydrogen at elevated irradiation temperatures or small irradiation biases. Using high-frequency capacitance-voltage (C-V) measurements, radiation-induced inversion voltage shifts are separated into components due to oxide trapped charge, interface traps and deactivated dopants, where the latter is computed from a reduction in Si capacitance. In the limit of no radiation-induced dopant deactivation, this approach reduces to the standard midgap charge separation technique used widely for the analysis of room-temperature irradiations. The technique is demonstrated on a p-type MOS capacitor irradiated with {sup 60}Co {gamma}-rays at 100 C and zero bias, where the dopant deactivation is significant.
Date: February 1, 2000
Creator: WITCZAK,STEVEN C.; WINOKUR,PETER S.; LACOE,RONALD C. & MAYER,DONALD C.
Partner: UNT Libraries Government Documents Department

Single-Event Upset and Snapback in Silicon-on-Insulator Devices and Integrated Circuits

Description: The characteristics Of ion-induced charge collection and single-event upset are studied in SOI transistors and circuits with various body tie structures. Impact ionization effects including single-event snapback are shown to be very important. Focused ion microbeam experiments are used to find single-event snapback drain voltage thresholds in n-channel SOI transistors as a function of device width. Three-Dimensional device simulations are used to determine single-event upset and snapback thresholds in SOI SRAMS, and to study design tradeoffs for various body-tie structures. A window of vulnerability to single-event snapback is shown to exist below the single-event upset threshold. The presence of single-event snapback in commercial SOI SRAMS is confirmed through broadbeam ion testing, and implications for hardness assurance testing of SOI integrated circuits are discussed.
Date: August 15, 2000
Creator: DODD,PAUL E.; SHANEYFELT,MARTY R.; WALSH,DAVID S.; SCHWANK,JAMES R.; HASH,GERALD L.; LOEMKER,RHONDA ANN et al.
Partner: UNT Libraries Government Documents Department

Field Dependent Dopant Deactivation in Bipolar Devices at Elevated irradiation Temperatures

Description: Metal-oxide-silicon capacitors fabricated in a bi-polar process were examined for densities of oxide trapped charge, interface traps and deactivated substrate acceptors following high-dose-rate irradiation at 100 C. Acceptor neutralization near the Si surface occurs most efficiently for small irradiation biases in depletion. The bias dependence is consistent with compensation and passivation mechanisms involving the drift of H{sup +} ions in the oxide and Si layers and the availability of holes in the Si depletion region. Capacitor data from unbiased irradiations were used to simulate the impact of acceptor neutralization on the current gain of an npn bipolar transistor. Neutralized acceptors near the base surface enhance current gain degradation associated with radiation-induced oxide trapped charge and interface traps by increasing base recombination. The additional recombination results from the convergence of carrier concentrations in the base and increased sensitivity of the base to oxide trapped charge. The enhanced gain degradation is moderated by increased electron injection from the emitter. These results suggest that acceptor neutralization may enhance radiation-induced degradation of linear circuits at elevated temperatures.
Date: August 15, 2000
Creator: WITCZAK,STEVEN C.; LACOE,RONALD C.; SHANEYFELT,MARTY R.; MAYER,DONALD C.; SCHWANK,JAMES R. & WINOKUR,PETER S.
Partner: UNT Libraries Government Documents Department

Thermal-stress effects on enhanced low-dose-rate sensitivity of linear bipolar circuits

Description: Thermal-stress effects are shown to have a significant impact on the enhanced low-dose-rate sensitivity of linear bipolar circuits. Implications of these results on hardness assurance testing and mechanisms are discussed.
Date: February 17, 2000
Creator: SHANEYFELT,MARTY R.; SCHWANK,JAMES R.; WITCZAK,STEVEN C.; RIEWE,LEONARD CHARLES; WINOKUR,PETER S.; HASH,GERALD L. et al.
Partner: UNT Libraries Government Documents Department

Single-event upset and snapback in silicon-on-insulator devices

Description: SEU is studied in SOI transistors and circuits with various body tie structures. The importance of impact ionization effects, including single-event snapback, is explored. Implications for hardness assurance testing of SOI integrated circuits are discussed.
Date: February 23, 2000
Creator: DODD,PAUL E.; SHANEYFELT,MARTY R.; SCHWANK,JAMES R.; HASH,GERALD L.; DRAPER,BRUCE L. & WINOKUR,PETER S.
Partner: UNT Libraries Government Documents Department