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open access

Heat Pipe Integrated Microsystems

Description: The trend in commercial electronics packaging to deliver ever smaller component packaging has enabled the development of new highly integrated modules meeting the demands of the next generation nano satellites. At under ten kilograms, these nano satellites will require both a greater density electronics and a melding of satellite structure and function. Better techniques must be developed to remove the subsequent heat generated by the active components required to-meet future computing requirem… more
Date: March 30, 1999
Creator: Gass, K.; Robertson, P.J.; Shul, R. & Tigges, C.
Partner: UNT Libraries Government Documents Department
open access

Precise time synchronization data acquisition with remote systems

Description: Researchers at the National Wind Technology Center have identified a need to acquire data on the rotor of an operating wind turbine at precisely the same time as other data is acquired on the ground or on a non-rotating part of the wind turbine. The researchers will analyze that combined data with statistical and correlation techniques to clearly establish phase information and loading paths and insights into the structural loading of wind turbines. A data acquisition unit has been developed to… more
Date: August 1, 1998
Creator: Berg, D.E. & Robertson, P.J.
Partner: UNT Libraries Government Documents Department
open access

Development and application of a light-weight, wind-turbine rotor-based data acquisition system

Description: Wind-energy researchers at the National Wind Technology Center (NWTC), representing Sandia National Laboratories (SNL) and the National Renewable Energy Laboratory (NREL), are developing a new, light-weight, modular data acquisition unit capable of acquiring long-term, continuous time-series data from small and/or dynamic wind-turbine rotors. The unit utilizes commercial data acquisition hardware, spread-spectrum radio modems, and Global Positioning System receivers, and a custom-built programm… more
Date: April 1, 1998
Creator: Berg, D.E.; Robertson, P.J. & Ortiz, M.F.
Partner: UNT Libraries Government Documents Department
open access

Complementary GaAs junction-gated heterostructure field effect transistor technology

Description: The first circuit results for a new GaAs complementary logic technology are presented. The technology allows for Independently optimizable p- and n- channel transistors with junction gates. Excellent loaded gate delays of 179 ps at 1.2 V and 319 ps at 0.8 V have been demonstrated at low power supply voltages. A power-delay product of 8.9 fJ was obtained at 0.8 V.
Date: September 1, 1994
Creator: Baca, A. G.; Zolper, J. C.; Sherwin, M. E.; Robertson, P. J.; Shul, R. J.; Howard, A. J. et al.
Partner: UNT Libraries Government Documents Department
open access

Complementary GaAs junction-gated heterostructure field effect transistor fabrication for integrated circuits

Description: A new GaAs junction-gated complementary logic technology that integrates a modulation doped p-channel heterostructure field effect transistor (pHFET) and a fully ion implanted n-channel JFET has recently been fabricated. High-speed, low-power operation has been demonstrated with loaded ring oscillators that show gate delays of 179 ps/stage for a power-delay product of 28 fJ at 1.2 V operation and 320 ps/stage and 8.9 fJ at 0.8 V operation. The principal advantages of this technology include the… more
Date: October 1, 1994
Creator: Baca, A. G.; Zolper, J. C.; Sherwin, M. E.; Robertson, P. J.; Shul, R. J.; Howard, A. J. et al.
Partner: UNT Libraries Government Documents Department
open access

0.5 μm E/D AlGaAs/GaAs heterostructure field effect transistor technology with DFET threshold adjust implant

Description: A doped-channel heterostructure field effect transistor (H-FET) technology has been developed with self-aligned refractory gate processing and using both enhancement- and depletion-mode transistors. D-HFET devices are obtained with a threshold voltage adjust implant into material designed for E-HFET operation. Both E- and D-HFETs utilize W/WSi bilayer gates, sidewall spacers, and rapid thermal annealing for controlling short channel effects. The 0.5 {mu}m E- HFETs (D-HFETs) have been demonstrat… more
Date: April 1997
Creator: Baca, A. G.; Sherwin, M. E.; Zolper, J. C.; Shul, R. J.; Briggs, R. D.; Heise, J. A. et al.
Partner: UNT Libraries Government Documents Department
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