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Combining the Best of Bulk and Surface Micromaching Using Si(111) Substrates

Description: This process combines the best features of bulk ad surface micromachining. It enables the production of stress free, thick, virtually arbitrarily shaped structures with well defiti thick or thin sacrificial layers, high sacrificial layer selectivity and large undercuts using IC compatible, processes. The basis of this approach is the use of dy available {111} oriented substrates. anisotropic Si trench etching, S iN masking and KOH etching.
Date: November 30, 1998
Creator: Fleming, J.G.
Partner: UNT Libraries Government Documents Department

Use of air gap structures to lower intralevel capacitance

Description: Interconnect delays, arising in part from intralevel capacitance, are one of the factors limiting the performance of advanced circuits. In addition, the problem of filling the spaces between neighboring metal lines with an insulator is becoming increasingly acute as aspect ratios increase. We address these problems simultaneously by intentionally creating an air gap between closely spaced metal lines. Undesirable topography is eliminated using a spin-on dielectric. We then cap the wafers with silicon dioxide and planarize using chemical mechanical polishing. Simple modeling of test structures predicts an equivalent dielectric constant of 1.9 on features similar to those expected for 0.25 micron technologies. Two level metal test structures fabricated in a 0.5 micron CMOS technology show that the process can be readily integrated with current standard CMOS processes. The potential problems of via misalignment, overall dielectric stack height, and the relative difficulty of ensuring void formation compared to that of ensuring a void-free fill are considered.
Date: March 1, 1997
Creator: Fleming, J.G. & Roherty-Osmun, E.
Partner: UNT Libraries Government Documents Department

Planar silicon fabrication process for high-aspect-ratio micromachined parts

Description: Surface-micromachined silicon inertial sensors are limited to relatively high-G applications in part because of the fundamental limitations on proof mass imposed by the manufacturing technology. At the same time, traditional micromolding technologies such as LIGA do not lend themselves to integration with electronics, a capability which is equally necessary for high-performance inertial sensors. The silicon micromolding processes described in this report promise to offer both larger proof masses and integrability with on-chip electronics. In Sandia`s silicon micromolding process, the proof mass is formed using a mold which is first recessed into the substrate using a deep silicon trench etch, then lined with a sacrificial or etch-stop layer, and filled with mechanical polysilicon. Since the mold is recessed into the substrate, the whole micromechanical structure can be formed, planarized, and integrated with standard silicon microelectronic circuits before the release etch. In addition, unlike surface-micromachined parts, the thickness of the molded parts is limited by the depth of the trench etch (typically 10--50 {micro}m) rather than the thickness of deposited polysilicon (typically 2 {micro}m). The fact that the high-aspect-ratio section of the device is embedded in the substrate enables the monolithic integration of high-aspect-ratio parts with surface-micromachined mechanical parts, and, in the future, also electronics. The authors anticipate that such an integrated mold/surface micromachining/electronics process will offer versatile high-aspect-ratio micromachined structures that can be batch-fabricated and monolithically integrated into complex microelectromechanical systems including high-performance inertial sensing systems.
Date: September 1, 1997
Creator: Barron, C.C. & Fleming, J.G.
Partner: UNT Libraries Government Documents Department

A Three-Dimensional Optical Photonic Crystal

Description: The search for a photonic crystal to confine optical waves in all three dimensions (3D) has proven to be a formidable task. It evolves from an early theoretical suggestion [1,2], a brief skepticism [3-5] and triumph in developing the mm-wave [6-8] and infrared 3D photonic crystals [9]. Yet, the challenge remains, as the ultimate goal for optoelectronic applications is to realize a 3D crystal at X=1.5 pm communication wavelengths. Operating at visible and near infrared wavelengths, X=1-2 pm, a photonic crystal may enhance the spontaneous emission rate [1, 10] and give rise to a semiconductor lasers with a zero lasing threshold[11, 12]. Another important application is optically switching, routing and interconnecting light [13,14] with an ultrafast transmission speed of terabits per second. A photonic crystal may also serve as a platform for integrating an all-optical circuitry with multiple photonic components, such as waveguides and switches, built on one chip [15]. In this Letter, we report on the successful fabrication of a working 3D crystal operating at optical L The minimum feature size of the 3D structure is 180 nanometers. The 3D crystal is free from defects over the entire 6-inch silicon wafer and has an absolute photonic band gap centered at A.-1.6 pm. Our data provides the first conclusive evidence for the existence of a full 3D photonic band gap in optical A. This development will pave the way to tinier, cheaper, more effective waveguides, optical switches and lasers.
Date: December 17, 1998
Creator: Fleming, J.G. & Lin, S.
Partner: UNT Libraries Government Documents Department

Three-Dimensional Silicon Photonic Lattice

Description: Silicon processing techniques were used to fabricate 3-D photonic lattices with band gaps in the infrared. The demonstration vehicle was a selective infrared mirror/band pass filter, a wide range of other applications are also possible.
Date: November 30, 1998
Creator: Fleming, J.G. & Lin, S.
Partner: UNT Libraries Government Documents Department

A Three-Dimensional Photonic Crystal with Stop Band Between at 1.35 and 1.95 Microns

Description: A combination of advanced silicon processing techniques were used to create three- dimensional (3D) photonic crystals with a 180 nano-meter minimum dimension. The resulting 3D crystal displays a strong stop band at optical wavelengths, L=l .35- 1.95pm. This is the smallest 3D crystal ever achieved with a complete 3D photonic band gap.
Date: October 27, 1998
Creator: Fleming, J.G. & Lin, S.
Partner: UNT Libraries Government Documents Department

Novel silicon fabrication process for high-aspect-ratio micromachined parts

Description: Bulk micromachining generally refers to processes involving wet chemical etching of structures formed out of the silicon substrate and so is limited to fairly large, crude structures. Surface micromachining allows intricate patterning of thin films of polysilicon and other materials to form essentially two-dimensional layered parts (since the thickness of the parts is limited by the thickness of the deposited films). There is a third type of micromachining in which the part is formed by filling a mold which was defined by photolithographic means. Historically micromachining molds have been formed in some sort of photopolymer, be it with x-ray lithography (``LIGA``) or more conventional UV lithography, with the aim of producing piece parts. Recently, however, several groups including ours at Sandia have independently come up with the idea of forming the mold for mechanical parts by etching into the silicon substrate itself. In Sandia`s mold process, the mold is recessed into the substrate using a deep silicon trench etch, lined with a sacrificial or etch-stop layer, and then filled with any of a number of mechanical materials. The completed structures are not ejected from the mold to be used as piece parts rather, the mold is dissolved from around selected movable segments of the parts, leaving the parts anchored to the substrate. Since the mold is recessed into the substrate, the whole micromechanical structure can be formed, planarized, and integrated with standard silicon microelectronic circuits before the release etch. In addition, unlike surface-micromachined parts, the thickness of the molded parts is limited by the depth of the trench etch (typically 10--50 {mu}m) rather than the thickness of deposited polysilicon (typically 2 {mu}m). The capability of fabricating thicker (and therefore much stiffer and more massive) parts is critical for motion-sensing structures involving large gimballed platforms, proof masses, etc.
Date: August 1, 1995
Creator: Fleming, J.G. & Barron, C.C.
Partner: UNT Libraries Government Documents Department

3-D Silicon Photonic Lattices- Cornerstone of an Emerging Photonics Revolution

Description: Three-dimensional photonic lattices are engineered materials which are the photonic analogues of semiconductors. These structures were first proposed and demonstrated in the mid-to-late 1980's. However, due to fabrication difficulties, lattices active in the infrared are only just emerging. Wide ranges of structures and fabrication approaches have been investigated. The most promising approach for many potential applications is a diamond-like structure fabricated using silicon microprocessing techniques. This approach has enabled the fabrication of 3-D silicon photonic lattices active in the infrared. The structures display band gaps centered from 12{micro} down to 1.55{micro}.
Date: July 8, 1999
Creator: Fleming, J.G. & Lin, Shawn-Yu
Partner: UNT Libraries Government Documents Department

Sequential deposition etch techniques for the selective deposition of tungsten

Description: We report on the use of a deposition/etch approach to the loss of selectivity problem, using high activity fluorine chemistries in the etch step. Proof-of-concept experiments were initially performed in a hot wall system, the excellent results obtained lead us to prove out the concept in a commercially available cold wall Genus reactor. We observed that WF{sub 6} is ineffective as an etchant of W. The technique has been able to produce perfectly selective depositions 1 micron thick in both hot wall, and cold wall, systems. Sheet resistivity values and film morphology are good. 9 refs., 4 figs., 1 tab.
Date: January 1, 1991
Creator: Fleming, J.G.; Omstead, T.R. & Dominguez, F.
Partner: UNT Libraries Government Documents Department

Microstructure of GaN Grown on (111) Si by MOCVD

Description: Gallium nitride was grown on (111) Si by MOCVD by depositing an AIN buffer at 108O"C and then GaN at 1060 {degrees}C. The 2.2pm layer cracked along {1-100} planes upon cooling to room temperature, but remained adherent. We were able to examine the microstructure of material between cracks with TEM. The character and arrangement of dislocation are much like those of GaN grown on Al{sub 2}O{sub 3}: -2/3 pure edge and - 1/3 mixed (edge + screw), arranged in boundaries around domains of GaN that are slightly disoriented with respect to neighboring material. The 30 nm AIN buffer is continuous, indicating that AIN wets the Si, in contrast to GaN on Al{sub 2}O{sub 3}.
Date: December 17, 1998
Creator: Fleming, J.G.; Follstaedt, D.M.; Han, J. & Provencio, P.
Partner: UNT Libraries Government Documents Department

Characteristics of CVD ternary refractory nitride diffusion barriers

Description: A range of different ternary refractory nitride compositions have been deposited by CVD (chemical vapor deposition) for the systems TiSiN, WBN, and WSiN. The precursors used are readily available. The structure, electrical, and barrier properties of the films produced by CVD are similar to those observed for films with similar compositions deposited by PVD (physical vapor deposition). The step coverage of the CVD processes developed is good and in some cases, exceptional. A combination of desirable resistivity, step coverage, and barrier properties exists simultaneously over a reasonable range of compositions for each system. Initial attempts to integrate WSiN films into a standard 0.5 micrometer CMOS process flow in place of a sputtered Ti/TiN stack were successful.
Date: November 1, 1996
Creator: Fleming, J.G.; Smith, P.M. & Custer, J.S.
Partner: UNT Libraries Government Documents Department

Lowering of intralevel capacitance using air gap structures

Description: Interconnect delays, arising in part from intralevel capacitance, are one of the limiting factors in the performance of advanced integrated circuits. In addition, the problem of filling the spaces between neighboring metal lines with an insulator is becoming increasingly severe as aspect ratios increase. We address these problems by intentionally creating a air gap between closely spaced metal lines. The ends of the air gap and reentrant features are then sealed using a spin on dielectric. The entire structure is then capped with silicon dioxide and planarized . Simple modeling of mechanical test structures on silicon predicts an equivalent dielectric constant of 1.9 on features similar to those expected for 0.25 micron technologies. Metal to metal test structures fabricated in a 0.5 micron CMOS technology show that the process can be readily integrated with chemical mechanical polishing and current standard CMOS processes.
Date: November 1, 1996
Creator: Fleming, J.G.; Roherty-Osmun, E. & Farino, A.J.
Partner: UNT Libraries Government Documents Department

Fabrication of large area gratings with sub-micron pitch using mold micromachining

Description: In this work, the authors have applied mold micromachining and standard photolithographic techniques to the fabrication of parts integrated with 0.4 micron pitch diffraction gratings. In principle, the approach should be scaleable to considerably finer pitches. They have achieved this by relying on the thickness of deposited or grown films, instead of photolithography, to determine the grating pitch. The gratings can be made to extend over large areas and the entire process is compatible with batch processing. Literally thousands of parts can be batch fabricated from a single lot of six inch wafers. In the first stage of the process they fabricate a planarized silicon dioxide pad over which the silicon nitride wave guide runs. The grating is formed by first patterning and etching single crystalline silicon to form a series of trenches with well defined pitch. The silicon bounding the trenches is then thinned by thermal oxidation followed by stripping of the silicon dioxide. The trenches are filled by a combination of polysilicon depositions and thermal oxidations. Chemical mechanical polishing (CMP) is used to polish back these structures resulting in a series of alternating 2000 {angstrom} wide lines of silicon and silicon dioxide. The thickness of the lines is determined by the oxidation time and the polysilicon deposition thickness. The silicon lines are selectively recessed by anisotropic reactive ion etching, thus forming the mold for the grating. The mold is filled with low stress silicon nitride deposited by chemical vapor deposition. A wave guide is then patterned into the silicon nitride and the mold is locally removed by a combination of deep silicon trench etching and wet KOH etching. This results in a suspended diffraction grating/membrane over the KOH generated pit.
Date: March 1, 1997
Creator: Fleming, J.G.; Barron, C.C.; Stallard, B. & Kaushik, S.
Partner: UNT Libraries Government Documents Department

Non-contact atomic-level interfacial force microscopy

Description: The scanning force microscopies (notably the Atomic Force Microscope--AFM), because of their applicability to nearly all materials, are presently the most widely used of the scanning-probe techniques. However, the AFM uses a deflection sensor to measure sample/probe forces which suffers from an inherent mechanical instability that occurs when the rate of change of the force with respect to the interfacial separation becomes equal to the spring constant of the deflecting member. This instability dramatically limits the breadth of applicability of AFM-type techniques to materials problems. In the course of implementing a DOE sponsored basic research program in interfacial adhesion, a self-balancing force sensor concept has been developed and incorporated into an Interfacial Force Microscopy (IFM) system by Sandia scientists. This sensor eliminates the instability problem and greatly enhances the applicability of the scanning force-probe technique to a broader range of materials and materials parameters. The impact of this Sandia development was recognized in 1993 by a Department of Energy award for potential impact on DOE programs and by an R and D 100 award for one of the most important new products of 1994. However, in its present stage of development, the IFM is strictly a research-level tool and a CRADA was initiated in order to bring this sensor technology into wide-spread availability by making it accessible in the form of a commercial instrument. The present report described the goals, approach and results of this CRADA effort.
Date: February 1, 1997
Creator: Houston, J.E. & Fleming, J.G.
Partner: UNT Libraries Government Documents Department

Novel thin film field emission electron source laboratory directed research and development final report

Description: The objective of this project was to demonstrate proof of concept of a thin film field emission electron source based on electron tunneling between discrete metal islands on an insulating substrate. An electron source of this type should be more easily fabricated permitting the use of a wider range of materials, and be less prone to damage and erratic behavior than the patterned field emitter arrays currently under development for flat panel displays and other vacuum microelectronic applications. This report describes the results of the studies of electron and light emission from such structures, and the subsequent discovery of a source of light emission from conductive paths across thin insulating gaps of the semiconductor-insulator-semiconductor (SIS) and metal-insulator-semiconductor (MIS) structures. The substrates consisted of silicon nitride and silicon dioxide on silicon wafers, Kapton{reg_sign}, quartz, and cut slabs of silica aerogels. The conductive film samples were prepared by chemical vapor deposition (CVD) and sputtering, while the MIS and SIS samples were prepared by CVD followed by cleaving, grinding, mechanical indentation, erosion by a sputter Auger beam, electrical arcing and chemical etching. Electron emission measurements were conducted in high and ultra high vacuum systems at SNL, NM as well as at SNL, CA. Optical emission measurements were made in air under an optical microscope as well as in the above vacuum environments. Sample morphology was investigated using both scanning electron microscopy (SEM) and transmission electron microscopy (TEM).
Date: April 1, 1997
Creator: Walko, R.J.; Fleming, J.G. & Hubbs, J.W.
Partner: UNT Libraries Government Documents Department

Micromachined silicon seismic accelerometer development

Description: Batch-fabricated silicon seismic transducers could revolutionize the discipline of seismic monitoring by providing inexpensive, easily deployable sensor arrays. Our ultimate goal is to fabricate seismic sensors with sensitivity and noise performance comparable to short-period seismometers in common use. We expect several phases of development will be required to accomplish that level of performance. Traditional silicon micromachining techniques are not ideally suited to the simultaneous fabrication of a large proof mass and soft suspension, such as one needs to achieve the extreme sensitivities required for seismic measurements. We have therefore developed a novel {open_quotes}mold{close_quotes} micromachining technology that promises to make larger proof masses (in the 1-10 mg range) possible. We have successfully integrated this micromolding capability with our surface-micromachining process, which enables the formation of soft suspension springs. Our calculations indicate that devices made in this new integrated technology will resolve down to at least sub-{mu}G signals, and may even approach the 10{sup -10} G/{radical}Hz acceleration levels found in the low-earth-noise model.
Date: August 1, 1996
Creator: Barron, C.C.; Fleming, J.G. & Montague, S.
Partner: UNT Libraries Government Documents Department

New novel cleaning technique for extending mean time between mechanical cleans in a Genus tungsten CVD reactor

Description: During the chemical vapor deposition of blanket tungsten from the reduction of tungsten hexafluoride (WF{sub 6}), metallic parts within the reaction chamber accumulate metallic tungsten, tungsten oxyfluorides, and other related tungsten species. The usual method for removal of the chamber deposits is to open the chamber and perform a labor intensive mechanical clean, which involves the use of hydrogen peroxide (H{sub 2}O{sub 2}) and deionized (DI) water, or an in-situ fluorine-base plasma clean. The authors have investigated the use of repetitive in-situ nitrogen trifluoride (NF{sub 3}) plasma cleans during the course of operating a Genuse 8721 tungsten chemical vapor deposition reactor. The Genuse reactor has been retrofitted with self-ratchetting linear slides, which allow the wafer clamps to be extended into the NF{sub 3} plasma. They have extended the mean time between failures (MTBF) due to the use of 10 minute plasma clean every 75--100 wafers. Deposition for this process is 8,000 angstroms per wafer, using 6 deposition sites. The total tungsten deposition for a 0.5 micron tungsten plug is 4 microns, per a 25 wafer lot. Instead of a total removal of the accumulated tungsten from the chamber hardware, a partial etchback of the deposition from the wafer clamps and wafer chucks was performed. With this, sources for particles and backside deposition were eliminated. They see an increase in wafer-to-wafer uniformity, lot-to-lot repeatability, and particle reduction due to the use of frequent plasma clean. Recovery time after a plasma clean is excellent and no detrimental effects from hydrogen fluoride ``poisoning`` were seen.
Date: December 31, 1994
Creator: Lujan, R. D.; Fleming, J. G.; Baird, J. L. & Gentry, M. S.
Partner: UNT Libraries Government Documents Department

A new manufacturing method for the formation of gated field emission structures

Description: Functioning, matrixed, field emission devices have been fabricated using a modification of standard integrated circuit fabrication techniques. The emitter-to-gate spacing is fixed by the thickness of a deposited oxide and not by photolithographic techniques. Modeling of the emitted electron trajectories using a two dimensional, Poisson solver, finite difference code indicates that much of the current runs perpendicular to plane of the part. Functioning triode structures have been fabricated using this approach. Emission current, to a collector electrically and physically separated from the matrixed array follows Fowler-Nordheim behavior.
Date: July 1, 1994
Creator: Fleming, J. G.; Walko, R. & King, D.
Partner: UNT Libraries Government Documents Department

Photonic Band Gap Micro-Cavities in Three-Dimension

Description: Localization of light to less than a cubic wavelength, {lambda}{sup 3}, has important quantum consequences. The creation of single mode cavities and the modification of spontaneous emission are two important examples. A defect formed inside a three-dimensional (3D) photonic crystal provides an unique optical environment for light localization. Single mode defect cavities were built, for the first time, from an infrared 3D photonic crystal. A cavity state with modal volume of less than one {lambda}{sup 3} was observed.
Date: April 26, 1999
Creator: Biswas, R.; Fleming, J.G.; Ho, K.M.; Lin, Shawn-Yu & Sigalas, M.M.
Partner: UNT Libraries Government Documents Department

Integrated mold/surface-micromachining process

Description: We detail a new monolithically integrated silicon mold/surface-micromachining process which makes possible the fabrication of stiff, high-aspect-ratio micromachined structures integrated with finely detailed, compliant structures. An important example, which we use here as our process demonstration vehicle, is that of an accelerometer with a large proof mass and compliant suspension. The proof mass is formed by etching a mold into the silicon substrate, lining the mold with oxide, filling it with mechanical polysilicon, and then planarizing back to the level of the substrate. The resulting molded structure is recessed into the substrate, forming a planar surface ideal for subsequent processing. We then add surface-micromachined springs and sense contacts. The principal advantage of this new monolithically integrated mold/surface-micromachining process is that it decouples the design of the different sections of the device: In the case of a sensitive accelerometer, it allows us to optimize independently the proof mass, which needs to be as large, stiff, and heavy as possible, and the suspension, which needs to be as delicate and compliant as possible. The fact that the high-aspect-ratio section of the device is embedded in the substrate enables the monolithic integration of high-aspect-ratio parts with surface-micromachined mechanical parts, and, in the future, also electronics. We anticipate that such an integrated mold/surface micromachining/electronics process will offer versatile high-aspect-ratio micromachined structures that can be batch-fabricated and monolithically integrated into complex microelectromechanical systems.
Date: March 1, 1996
Creator: Barron, C.C.; Fleming, J.G.; Montague, S.; Sniegowski, J.J. & Hetherington, D.L.
Partner: UNT Libraries Government Documents Department

Micromachined silicon seismic transducers

Description: Batch-fabricated silicon seismic transducers could revolutionize the discipline of CTBT monitoring by providing inexpensive, easily depolyable sensor arrays. Although our goal is to fabricate seismic sensors that provide the same performance level as the current state-of-the-art ``macro`` systems, if necessary one could deploy a larger number of these small sensors at closer proximity to the location being monitored in order to compensate for lower performance. We have chosen a modified pendulum design and are manufacturing prototypes in two different silicon micromachining fabrication technologies. The first set of prototypes, fabricated in our advanced surface- micromachining technology, are currently being packaged for testing in servo circuits -- we anticipate that these devices, which have masses in the 1--10 {mu}g range, will resolve sub-mG signals. Concurrently, we are developing a novel ``mold`` micromachining technology that promises to make proof masses in the 1--10 mg range possible -- our calculations indicate that devices made in this new technology will resolve down to at least sub-{mu}G signals, and may even approach to 10{sup {minus}10} G/{radical}Hz acceleration levels found in the low-earth-noise model.
Date: August 1, 1995
Creator: Barron, C.C.; Fleming, J.G.; Sniegowski, J.J.; Armour, D.L. & Fleming, R.P.
Partner: UNT Libraries Government Documents Department

W-Coating for MEMS

Description: The integration of miniaturized mechanical components has spawned a new technology known as microelectromechanical systems (MEMS). Surface micromachining, defined as the fabrication of micromechanical structures from deposited thin films, is one of the core technological processes underlying MEMS. Surface micromachined structures have a large ratio of surface area to volume which makes them particularly vulnerable to adhesion to the substrate or adjacent structures during release or in use--a problem is called stiction. Since microactuators can have surfaces in normal or sliding contact, function and wear are critical issues for reliable operation of MEMS devices. Surface modifications are needed to reduce adhesion and friction in micromechanical structures. In this paper, we will present a process used to selectively coat MEMS devices with Tungsten using a CVD (Chemical Vapor Deposition) process. We will discuss the effect of wet and vapor phase cleans along with different process variables. Endurance of the W coating is important, especially in applications where wear due to repetitive contacts with the film may occur. Further, tungsten is hard and chemically inert, Tungsten CVD is used in the integrated-circuit industry, which makes this, approach manufacturable.
Date: July 8, 1999
Creator: Fleming, J.G.; Mani, S.S. & Sniegowski, J.J.
Partner: UNT Libraries Government Documents Department

Three-Dimensional Silicon Photonic Crystals

Description: In this work, we report the realization of a series of silicon 3D photonic crystals operating in the infrared (IR), mid-IR and most importantly the near-IR (k= 1 -2pm) wavelengths. The structure maintains its crystal symmetry throughout the entire 6-inches wafer and holds a complete photonic bandgap.
Date: December 4, 1998
Creator: Biswas, R.; Fleming, J.G.; Hetherington, D.L.; Ho, K.M.; Lin, S.; Sigalas, M.M. et al.
Partner: UNT Libraries Government Documents Department

Chemical vapor deposition of ternary refractory nitrides for diffusion barrier applications

Description: As semiconductor device dimensions shrink, new diffusion barriers will be required. Amorphous refractory ternaries have been identified as promising barrier candidates; because sputtering may not be suitable, we have developed chemical vapor deposition processes for these materials. Acceptable deposition rates are found for each of these processes at 350 C, with all depositions performed between 300 and 450 C. The first process produces a range of Ti-Si-N compositions from Ti organometallic, SiH{sub 4}, and NH{sub 3}. Resistivity of the Ti-Si-N films changes with Si content from >1{Omega}-cm at 25 at.% Si down to that of TiN (200{mu}{Omega}-cm). Step coverage obtained is better than 80% on 0.5 {mu}m features with aspect ratios of >1.6. The second CVD process produces a range of W-Si-N film compositions from WF{sub 6}, Si{sub 2}H{sub 6}, and NH{sub 3}. Resistivities vary with composition from 350 to 20,000 {mu}{Omega}-cm. Step coverage obtained is 100% on reentrant 0.25 {mu}m features with aspect ratios of 4.0. The third process employs WF{sub 6}(reduced by SiH{sub 4}), B{sub 2}H{sub 6}, and NH{sub 3} to produce W-B-N films with a range of compositions. Resistivities range from 200 to 20,000 {mu}{Omega}-cm. Step coverage obtained is {approx}40% on 1.5 {mu}m features with aspect ratios of 5.5.
Date: June 1, 1996
Creator: Smith, P.M.; Custer, J.S.; Fleming, J.G.; Roherty-Osmun, E.; Cohn, M. & Jones, R.V.
Partner: UNT Libraries Government Documents Department