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Co-training and Self-training for Word Sense Disambiguation

Description: This paper investigates the application of co-training and self-training to word sense disambiguation. Optimal and empirical parameter selection methods for co-training and self-training are investigated, with various degrees of error reduction. A new method that combines co-training with majority voting is introduced, with the effect of smoothing the bootstrapping learning curves, and improving the average performance.
Date: May 2004
Creator: Mihalcea, Rada, 1974-
Partner: UNT College of Engineering

A Framework to Simulate and Visualize Epidemics

Description: This poster was featured at the 2013 Perot Museum of Nature and Science's 'Social Science' exhibit. The poster discusses a framework to simulate and visualize epidemics.
Date: June 21, 2013
Creator: Mikler, Armin R.; O'Neill, Marty; Helsing, Joseph; Camp, Taylor & Indrakanti, Saratchandra
Partner: UNT College of Engineering

Global Stochastic Field Simulator

Description: This poster was featured at the 2013 Perot Museum of Nature and Science's 'Social Science' exhibit. It discusses the Global Stochastic Field Simulator, conceived in the summer of 2011.
Date: June 21, 2013
Creator: Mikler, Armin R.; O'Neill, Marty; Helsing, Joseph; Camp, Taylor & Indrakanti, Saratchandra
Partner: UNT College of Engineering

Facile, scalable synthesis of edge-halogenated graphene nanoplatelets as efficient metal-free eletrocatalysts for oxygen reduction reaction

Description: Article on facile, scalable synthesis of edge-halogenated graphene nanoplatelets as efficient metal-free electrocatalysts for oxygen reduction reaction.
Date: February 1, 2013
Creator: Jeon, In-Yup; Choi, Hyun-Jung; Choi, Min; Seo, Jeong-Min; Jung, Sun-Min; Kim, Min-Jung et al.
Partner: UNT College of Engineering

How to Hide Secrets from Operating System: Architecture Level Support for Dynamic Address Trace Obfuscation

Description: This technical report addresses how to hide secrets from an operating system. The authors provide a detailed design for the VM blackbox and some microarchitecture level simulation derived performance data. They also describe a compiler directed prefetch scheme that uses both instruction and data prefetches to obfuscate the address traces on the address bus between on-chip L2 cache and memory.
Date: 2004
Creator: Gomathisankaran, Mahadevan & Tyagi, Akhilesh
Partner: UNT College of Engineering