Method and Apparatus For Improving Computer Cache Performance and for Protecting Memory Systems Against Some Side Channel Attacks

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Description

Patent relating to a method and apparatus both for improving execution performance and for protecting memory system against some side channel attacks.

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14 p. : ill.

Creation Information

Kavi, Krishna M. July 19, 2016.

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This patent is part of the collection entitled: UNT Scholarly Works and was provided by UNT College of Arts and Sciences to Digital Library, a digital repository hosted by the UNT Libraries. It has been viewed 41 times , with 4 in the last month . More information about this patent can be viewed below.

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Description

Patent relating to a method and apparatus both for improving execution performance and for protecting memory system against some side channel attacks.

Physical Description

14 p. : ill.

Notes

Abstract: A physical cache memory that is divided into one or more virtual segments using multiple circuits to decode addresses is provided. An address mapping and an address decoder is selected for each virtual segment. The address mapping comprises two or more address bits as set indexes for the virtual segment and the selected address bits are different for each virtual segment. A cache address decoder is provided for each virtual segment to enhance execution performance of programs or to protect against the side channel attack. Each physical cache address decoder comprises an address mask register to extract the selected address bits to locate objects in the virtual segment. The foregoing can be implemented as a method or apparatus for protecting against a side channel attack.

Prior Publication Data: US 2012/0297110 A1, Nov. 22, 2012.

Related U.S. Application Data: Provisional application No. 61/487,477, filed on May 18, 2011.

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  • November 22, 2012

Accepted Date

  • July 19, 2016

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  • July 19, 2016

Added to The UNT Digital Library

  • Aug. 29, 2017, 9:38 a.m.

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Kavi, Krishna M. Method and Apparatus For Improving Computer Cache Performance and for Protecting Memory Systems Against Some Side Channel Attacks, patent, July 19, 2016; Washington, D.C.. (digital.library.unt.edu/ark:/67531/metadc990984/: accessed October 20, 2018), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT College of Arts and Sciences.