Summary/prognosis of the workshop Page: 4 of 19
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2.1. Hardware ,
First, there is' hardware. The first commercial machine I worked with, an IBM
704 at Space Technology Laboratories, had a speed of '-8 kiloFLOPS,'and a
memory of 8 732 kilowords,'each'36 bits long (about,8- 9 significant figures).
These numbers are pathetic by today's standards. When'I arrived at -Caltech
in 1959, we had a Burroughs 220. It had paper-tape input (making corrections
was a minor horror), an electrostatic printer that always smudged the output,
and required machine-language coding. It was a step backward'from the -IBM
704. But, in the autumn of 1961, Caltech got access to an IBM 7090 at JPL.
We regarded the 7090 as a giant leap forward. Input was from easy-to-correct
punched cards. For a big code one had to transport several boxes of 2000
cards apiece to the computer, some miles away (there were no networks) by
automobile. I used to joke that "computing builds weak minds, but sound
bodies". The 7090 was faster than the 704, but I don't remember the numbers;
its main advantage was that it was transistorized, hence more reliable. Its mean
time to failure was days to weeks; the 704 and its big brother the 709 crashed
daily. At the time I thought the 7090 was a wonderful machine; but before I
finished my thesis I made a trip to the Scripps Oceanographic Institute in La
Jolla, and was surprised by a poster comparing the 7090 to the Control Data
Corporation 3600, designed by a young engineer named Seymour Cray. It was
faster than the 7090, had a larger memory, and had 60 bit words, hence much
better precision. It also had independent peripheral processors to handle I/O.
That one man would be the driving force in the industry until his premature
death (by auto accident) a few years ago.
Cray's next triumph, the CDC 6600, had multiple-add/multiply/logic reg-
isters that could operate in parallel, and incorporated his "stunt-box", in which
he flagged, in a 10 by 10 matrix, those operations contingent on others, having
to wait until the first operation was completed, and those which could simply
go ahead, so the results would be ready when finally needed. The 6600 was a
very fast machine for its day, and was the workhorse of NCAR for a number of
years; NCAR's contribution to its success was to develop smart compilers and
highly optimized systems that pushed the hardware to its absolute capacity.
Cray's next step was the CDC 7600, which was pipelined, so that if any
register (operating in parallel with others) could be fed a string of data, one
would obtain, after a latency, one result per clock cycle at the pipe's output.
This machine had the best balanced input/output structure of any on which I
worked. There was a 65 kiloword fast "small core memory" (SCM), 512 kilowords
of slower "large core memory" (LCM), and a huge (much slower) disk farm. Huge
block transfers back and forth between SCM and LCM took only a few memory
cycles. And transfers between LCM and the disk were double-buffered: a read
operation could be started, computations in the SCM continued, and check at a
later time to see if it was done; the same for write operations. The parameters of
these three memory stages were well matched. Auer and I were able to do some
early 2D transport calculations needing about 4 Mwords (in 64 by 64 matrices)
on this machine with 100% overlap of the I/O by computations.
And then one day Cray blew us away with his CRAY-1A, a machine with a
200 nanosecond cycle, a megaword (later 4) of fast 64 bit memory, and parallel
vector registers in which 64 results could be obtained simultaneously. Compu-
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Mihalas, Dimitri,. Summary/prognosis of the workshop, article, January 1, 2002; United States. (https://digital.library.unt.edu/ark:/67531/metadc926066/m1/4/: accessed April 21, 2019), University of North Texas Libraries, Digital Library, https://digital.library.unt.edu; crediting UNT Libraries Government Documents Department.