Thermal and mechanical joints to cryo-cooled silicon monochromatorcrystals Page: 4 of 6
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the case for a silicon-to-silicon surface bonded with In/Ga/Sn eutectic. Two thermocouple traces are shown
and represent the temperature on either side of the thermal interface under test. The cryo-cooler is switched
on at time zero and with no thermal load the two thermocouples register similar temperatures until about -
1400C where the thermocouples diverge slightly. When power is applied via the resistor, the two
thermocouple traces diverge significantly, the upper one representing the monochromator crystal with the
thermal load, the lower representing the base on which the channel cut sits. Two cycles of power applied
through the resistor are shown. This joint is viewed as a failure (conductance <0.0lwatt/cm2/C) and it is
presumed that its failure occurred during cool-down as indicated by the thermocouple divergence at -
1400C. This plot differs markedly from a successful thermal joint shown in Figure 5b for a silicon-to-
silicon joint bonded with indium solder. Here the 2 thermocouple traces map closely over each other to
with in degree indicating very low thermal resistance of the solder joint (conductance > 1.2watt/cm2/OC).
Table 1 lists the range of thermal interfaces tried.
10AM 11AM 12PM 1PM 1200 1230 1300 1330 1400
Time (hrs) Time (hrs)
Figure 5. Cool-down traces of 2 thermocouples on either side of a silicon-silicon joint with different thermal joints a)
In/Ga/Sn eutectic and b) Indium solder. In the case of b) both traces lie on top of each other indicating low thermal
resistance of the joint. Twp power cycles of 15 watts are applied to the system.
Side 1 Side 2 Thermal Joint Performance &
1 Etched silicon, radius ~ Nickel plated copper Ga/In/Sn eutectic, Failed after 2 months
5m concave Liguidus = 11 C
2 Silicon, lapped Nickel plated copper Ga/In/Sn eutectic Partial success for 2-3
thermal cycles before
3 Silicon, lapped Nickel plated copper Indium foil - light Survived thermal cycles
pressure but had poor thermal
4 Silicon, lapped Silicon, lapped Ga/In/Sn eutectic Failed on cool-down
5 Silicon, lapped Silicon, lapped Apezion N grease Survived for multiple
thermal cycles but showed
some thermal resistance
6 Silicon, lapped Silicon, lapped In/Bi/Sn solder, Failed on cool-down
Liquidus =790C, type
#174 Indium Corp.,
7 Silicon, lapped Silicon, lapped Indium soldered Survived multiple thermal
Liquidus = 1570C cycles.
Table 1. Range of thermal interfaces tried with their performance. The lapped silicon has a estimated micro-roughness
value of 0.24m rms
The choice of the interfaces for the channel cut crystal evolved from silicon-copper to silicon-silicon as the
various failures suggested a better thermal expansion coefficient match the substrates would be in order.
Thus joint #3 (Figure 2) became a requirement. This copper-silicon joint consisted of a thermal interface of
n Off Off
On Off On Off
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MacDowell, A.; Fakra, S. & Morrison, G. Thermal and mechanical joints to cryo-cooled silicon monochromatorcrystals, article, July 14, 2006; Berkeley, California. (digital.library.unt.edu/ark:/67531/metadc893362/m1/4/: accessed December 15, 2018), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.