Understanding and Mitigating Multicore Performance Issues on theAMD Opteron Architecture

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Over the past 15 years, microprocessor performance hasdoubled approximately every 18 months through increased clock rates andprocessing efficiency. In the past few years, clock frequency growth hasstalled, and microprocessor manufacturers such as AMD have moved towardsdoubling the number of cores every 18 months in order to maintainhistorical growth rates in chip performance. This document investigatesthe ramifications of multicore processor technology on the new Cray XT4?systems based on AMD processor technology. We begin by walking throughthe AMD single-core and dual-core and upcoming quad-core processorarchitectures. This is followed by a discussion of methods for collectingperformance counter data to understand code performance on ... continued below

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Levesque, John; Larkin, Jeff; Foster, Martyn; Glenski, Joe; Geissler, Garry; Whalen, Stephen et al. March 7, 2007.

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This report is part of the collection entitled: Office of Scientific & Technical Information Technical Reports and was provided by UNT Libraries Government Documents Department to Digital Library, a digital repository hosted by the UNT Libraries. More information about this report can be viewed below.

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Description

Over the past 15 years, microprocessor performance hasdoubled approximately every 18 months through increased clock rates andprocessing efficiency. In the past few years, clock frequency growth hasstalled, and microprocessor manufacturers such as AMD have moved towardsdoubling the number of cores every 18 months in order to maintainhistorical growth rates in chip performance. This document investigatesthe ramifications of multicore processor technology on the new Cray XT4?systems based on AMD processor technology. We begin by walking throughthe AMD single-core and dual-core and upcoming quad-core processorarchitectures. This is followed by a discussion of methods for collectingperformance counter data to understand code performance on the Cray XT3?and XT4? systems. We then use the performance counter data to analyze theimpact of multicore processors on the performance of microbenchmarks suchas STREAM, application kernels such as the NAS Parallel Benchmarks, andfull application codes that comprise the NERSC-5 SSP benchmark suite. Weexplore compiler options and software optimization techniques that canmitigate the memory bandwidth contention that can reduce computingefficiency on multicore processors. The last section provides a casestudy of applying the dual-core optimizations to the NAS ParallelBenchmarks to dramatically improve their performance.

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  • Report No.: LBNL--62500
  • Grant Number: DE-AC02-05CH11231
  • DOI: 10.2172/918496 | External Link
  • Office of Scientific & Technical Information Report Number: 918496
  • Archival Resource Key: ark:/67531/metadc885226

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  • March 7, 2007

Added to The UNT Digital Library

  • Sept. 22, 2016, 2:13 a.m.

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Levesque, John; Larkin, Jeff; Foster, Martyn; Glenski, Joe; Geissler, Garry; Whalen, Stephen et al. Understanding and Mitigating Multicore Performance Issues on theAMD Opteron Architecture, report, March 7, 2007; United States. (digital.library.unt.edu/ark:/67531/metadc885226/: accessed August 23, 2017), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.