FAST ANALOGUE MULTIPLIERS WITH FIELD-EFFECT TRANSISTORS

Radeka, V.

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Title

Main Title FAST ANALOGUE MULTIPLIERS WITH FIELD-EFFECT TRANSISTORS

Creator

Author: Radeka, V.

Creator Type: Personal

Contributor

Sponsor: U.S. Atomic Energy Commission

Contributor Type: Organization

Contributor Info: AEC

Publisher

Name: Brookhaven National Laboratory

Place of Publication: Upton, New York

Date

Creation: 1963-10-01

Language

English

Description

Content Description: The solution time of analog multipliers using field-effect transistors is investigated. This time is ultimately limited by the charging time of the transistor junction. In typical devices suitable for analog multiplication, the charging time is found to be about 10 to 20 nsec for a multiplication error of < 1%. A four quadrant pulse amplitude multiplier circuit with a solution time equal to the transistor charging time is described. (auth)
Physical Description: 12 p.

Subject

Keyword: Computers
Keyword: Transistors
Keyword: Analog Systems
Keyword: General And Miscellaneous

Source

Conference: International Symposium on Plasma Phenomena, San Diego, CA (United States), 29 Oct - 1 Nov 1963

Collection

Name: Office of Scientific & Technical Information Technical Reports

Code: OSTI

Institution

Name: UNT Libraries Government Documents Department

Code: UNTGD

Resource Type

Article

Format

Text

Identifier

Report No.: BNL-7448
Report No.: CONF-363-6
Grant Number: AT-30-2-GEN-16
Office of Scientific & Technical Information Report Number: 4105082
Archival Resource Key: ark:/67531/metadc867435