# FAST ANALOGUE MULTIPLIERS WITH FIELD-EFFECT TRANSISTORS Page: 4 of 14

The minimum solution time can be
defined as the time needed to change
the conductance of the field-effect
transistor to that required by the
accuracy of multiplication. As a change
in the gate-channel junction charge-is
necessary to change the channel conduct-
ance, the solution time is determined
by the junction charging time.
In this paper the charging time is
considered in terms of externally
measurable field-effect transistor
parameters, and with this, the relation
between minimum solution time and
permissible multiplication error is
given.
The minimum solution time can be
achieved if the junction charging
current does not appear at the
multiplier output. A method is
presented to prevent this. Thus the
solution time can be reduced to the
fundamental limits of field-effect
transistors. Examples of simple four-
quadrant pulse amplitude multipliers
are given.
The Field-Effect Transistor Charging
Time and Multiplication Accuracy
A planar field-effect transistor
with symmetrical geometry is shown in
Fig. la. The symmetrical geometry is
essential for multiplication linearityl
and, as will be shown later, for
fast multiplication. The gate-channel
junction is reverse biased and the
shaded area shows the depletion region
corresponding to the barrier potential
Vgo + Vdif = external bias + diffusion
potential. If a voltage step Ov is
applied between channel terminals and
the gate, in addition to Vgo, the
depletion region, and therefore the
conducting channel width, adjusts
itself to the new value of barrier
potential. The charge necessary to
change the depletion region width is
supplied through the channel. The
junction capacitance is distributed
along the channel and the channel-
junction combination can be considered

as a distributed RC transmission line.
In the region of linear multiplication
channel.conductance is linearly
proportional to gate voltage. If
Av(l,t) is the potential variation
distribution along the channel as a
function of time, the channel conduct-
ance variation as a function of time
is determined by

+L +L
1 dl -1 dl
. - g t) ( (
-L -L-

(4)

where K =JGo/1 Woo, Av is positive
when in reverse direction.
To determine the potential distribu-
tion as a function of time, an RC-line
equivalent of the field-effect transistor
can be used. Both distributed parameters
R = 1/0 and C are functions of the
gate-channel junction barrier potential.
However, if their relative variation is
small, they can be considered as
constants for the purpose of determining
the distribution of a small potential
variation. The linear equivalent
circuit in Fig. lb is described by

ua ;

(5)

where u = 1/2L and T = t/ (Rb Cb) are
normalized variables for distance and
time, Rb = 1/Gb and C are total
channel resistance an total gate-
channel capacitance at a given bias.
The potential distribution as a
function of time for step-function
variation is given by*

1 - -(2n1)r2T
A~u T) 4 I -ln
AV' + 1 - - nY 2n+ c

cos(2n+1)wu]

(6)

* General time domain treatment of
Eq. (5) known as Fourier-, heat flow-,
diffusion equation,2etc. is given by
Carslaw and Jaeger.

2

## Upcoming Pages

Here’s what’s next.

This article can be searched. Note: Results may vary based on the legibility of text within the document.

## Tools / Downloads

Get a copy of this page .

## Citing and Sharing

Basic information for referencing this web page. We also provide extended guidance on usage rights, references, copying or embedding.

### Reference the current page of this Article.

Radeka, V. FAST ANALOGUE MULTIPLIERS WITH FIELD-EFFECT TRANSISTORS, article, October 1, 1963; Upton, New York. (https://digital.library.unt.edu/ark:/67531/metadc867435/m1/4/ocr/: accessed May 20, 2019), University of North Texas Libraries, Digital Library, https://digital.library.unt.edu; crediting UNT Libraries Government Documents Department.