RHIC Timeline System Page: 2 of 7
This report is part of the collection entitled: Office of Scientific & Technical Information Technical Reports and was provided to Digital Library by the UNT Libraries Government Documents Department.
The following text was automatically extracted from the image on this page using optical character recognition software:
1.0 RHIC EVENT TIMELINE SYSTEM - RHIC EVENT TIMELINE SYSTEM
A modern accelerator must synchronize the operations of equipment over a wide area.
To facilitate this synchronization the RHIC event system will provide a highly reliable, serial
timing link to all equipment locations. Timing events and clocks from this link will be used to
initiate hardware operations including changes in settings, state changes, and data acquisitions.
Events may also be required by software running on systems not directly coupled to accelerator
hardware. A standard clock frequency of 10 MHz, as presently used in the AGS and Booster,
will provide adequate resolution for timing events in the RHIC acceleration and collision
Two mechanisms are available for generating events on the RHIC timeline, direct
hardware inputs and software initiated commands. Optically isolated TTL-level inputs are
provided for each of the 256 possible event codes. Event sequences to initiate waveforms, fire
kickers, and acquire data during the acceleration cycle, tune measurements, etc. will be
implemented by cascading programmable delays. Clocks that are of a general interest, such as
the 720 Hz clock generated by the main magnet power supply system will also be available on
the RHIC timeline. Externally generated events may also come from other systems sensing
unusual conditions with the beam. In the case of a beam abort, the abort event can be used to
freeze circular buffers in digitizers for post-mortem analysis.
An example of a software generated event would be one to activate new settings after
they have been loaded and verified. Software generated events also provide a convenient way
to commission new systems.
The probability exists that several event requests could occur simultaneously, or
overlapped in time. Since only one event can be processed at a time, priority resolution will be
an integral part of the central encoding facility. Event contention is handled in hardware with
highest priority given to input 0 and lowest given to input 255. It should be pointed out,
however, that lower priority events being processed will not be interrupted by the arrival of a
higher priority event request.
The RHIC central event encoder is to be located in the 4 o'clock equipment house. The
event encoder, its input modules, and supporting host computer interface will occupy a single
VME chassis. Each input module can support 16 inputs. The event system interconnections are
point-to-point, differential TTL. The event encoder modules are isolated from the receiving
modules by transformer coupling at the receiving module input. The event encoder initially
drives a fanout/repeater module which provides multiple buffered, TTL differential outputs.
Some outputs will be used locally within the 4 o'clock house, and others will drive fiber-optic
transmitters for transmission to remote RHIC equipment locations.
At each RHIC equipment location, the optical transmission is converted to single-ended
Here’s what’s next.
This report can be searched. Note: Results may vary based on the legibility of text within the document.
Tools / Downloads
Get a copy of this page or view the extracted text.
Citing and Sharing
Basic information for referencing this web page. We also provide extended guidance on usage rights, references, copying or embedding.
Reference the current page of this Report.
R., Conkling C. & Oerter, B. R. RHIC Timeline System, report, August 4, 1994; United States. (https://digital.library.unt.edu/ark:/67531/metadc864830/m1/2/: accessed April 24, 2019), University of North Texas Libraries, Digital Library, https://digital.library.unt.edu; crediting UNT Libraries Government Documents Department.