Auxiliary/Master microprocessor CAMAC Crate Controller applications

PDF Version Also Available for Download.

Description

The need for further sophistication of an already complex serial CAMAC control system at Fermilab led to the development of an Auxilary/Master CAMAC Crate Controller. The controller contains a Motorola 6800 microprocessor, 2K bytes of RAM, and 8K bytes of PROM memory. Bussed dataway lines are time shared with CAMAC signals to provide memory expansion and direct addressing of peripheral devices without the need of external cabling. The Auxiliary/Master Crate Controller (A/MCC) can function as either a Master, i.e., stand alone, crate controller or as an Auxiliary controller to Fermilab's Serial Crate Controller (SCC). Two modules, one single- and one ... continued below

Physical Description

4 p.

Creation Information

Barsotti, E. January 1, 1975.

Context

This article is part of the collection entitled: Office of Scientific & Technical Information Technical Reports and was provided by UNT Libraries Government Documents Department to Digital Library, a digital repository hosted by the UNT Libraries. More information about this article can be viewed below.

Who

People and organizations associated with either the creation of this article or its content.

Author

Publisher

Provided By

UNT Libraries Government Documents Department

Serving as both a federal and a state depository library, the UNT Libraries Government Documents Department maintains millions of items in a variety of formats. The department is a member of the FDLP Content Partnerships Program and an Affiliated Archive of the National Archives.

Contact Us

What

Descriptive information to help identify this article. Follow the links below to find similar items on the Digital Library.

Description

The need for further sophistication of an already complex serial CAMAC control system at Fermilab led to the development of an Auxilary/Master CAMAC Crate Controller. The controller contains a Motorola 6800 microprocessor, 2K bytes of RAM, and 8K bytes of PROM memory. Bussed dataway lines are time shared with CAMAC signals to provide memory expansion and direct addressing of peripheral devices without the need of external cabling. The Auxiliary/Master Crate Controller (A/MCC) can function as either a Master, i.e., stand alone, crate controller or as an Auxiliary controller to Fermilab's Serial Crate Controller (SCC). Two modules, one single- and one double-width, make up an A/ MCC. The microprocessor has one nonmaskable and one maskable vectored interrupt. Time sharing the dataway between SCC programmed and block transfer generated dataway cycles and A/MCC operations still allows a 99 percent microprocessor CPU busy time. Since the conception of the A/MCC, there has been an increasing number of control system-related projects proposed which would not have been possible or would have been very difficult to implement without such a device. The first such application now in use at Fermilab is a stand-alone control system for a mass spectrometer experiment in the Main Ring Internal Target Area. This application in addition to other proposed A/MCC applications, both stand-alone and auxiliary, is discussed. (auth)

Physical Description

4 p.

Notes

Dep. NTIS

Source

  • Nuclear science symposium, San Francisco, California, USA, 17 Nov 1975

Language

Item Type

Identifier

Unique identifying numbers for this article in the Digital Library or other systems.

  • Report No.: CONF-751116--4
  • Grant Number: None
  • Office of Scientific & Technical Information Report Number: 4143249
  • Archival Resource Key: ark:/67531/metadc864187

Collections

This article is part of the following collection of related materials.

Office of Scientific & Technical Information Technical Reports

Reports, articles and other documents harvested from the Office of Scientific and Technical Information.

Office of Scientific and Technical Information (OSTI) is the Department of Energy (DOE) office that collects, preserves, and disseminates DOE-sponsored research and development (R&D) results that are the outcomes of R&D projects or other funded activities at DOE labs and facilities nationwide and grantees at universities and other institutions.

What responsibilities do I have when using this article?

When

Dates and time periods associated with this article.

Creation Date

  • January 1, 1975

Added to The UNT Digital Library

  • Sept. 16, 2016, 12:32 a.m.

Description Last Updated

  • Oct. 10, 2017, 8:42 p.m.

Usage Statistics

When was this article last used?

Congratulations! It looks like you are the first person to view this item online.

Interact With This Article

Here are some suggestions for what to do next.

Start Reading

PDF Version Also Available for Download.

International Image Interoperability Framework

IIF Logo

We support the IIIF Presentation API

Barsotti, E. Auxiliary/Master microprocessor CAMAC Crate Controller applications, article, January 1, 1975; Batavia, Illinois. (digital.library.unt.edu/ark:/67531/metadc864187/: accessed October 16, 2018), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.