Hierarchical resilience with lightweight threads.

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This paper proposes methodology for providing robustness and resilience for a highly threaded distributed- and shared-memory environment based on well-defined inputs and outputs to lightweight tasks. These inputs and outputs form a failure 'barrier', allowing tasks to be restarted or duplicated as necessary. These barriers must be expanded based on task behavior, such as communication between tasks, but do not prohibit any given behavior. One of the trends in high-performance computing codes seems to be a trend toward self-contained functions that mimic functional programming. Software designers are trending toward a model of software design where their core functions are specified ... continued below

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12 p.

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Wheeler, Kyle Bruce October 1, 2011.

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Description

This paper proposes methodology for providing robustness and resilience for a highly threaded distributed- and shared-memory environment based on well-defined inputs and outputs to lightweight tasks. These inputs and outputs form a failure 'barrier', allowing tasks to be restarted or duplicated as necessary. These barriers must be expanded based on task behavior, such as communication between tasks, but do not prohibit any given behavior. One of the trends in high-performance computing codes seems to be a trend toward self-contained functions that mimic functional programming. Software designers are trending toward a model of software design where their core functions are specified in side-effect free or low-side-effect ways, wherein the inputs and outputs of the functions are well-defined. This provides the ability to copy the inputs to wherever they need to be - whether that's the other side of the PCI bus or the other side of the network - do work on that input using local memory, and then copy the outputs back (as needed). This design pattern is popular among new distributed threading environment designs. Such designs include the Barcelona STARS system, distributed OpenMP systems, the Habanero-C and Habanero-Java systems from Vivek Sarkar at Rice University, the HPX/ParalleX model from LSU, as well as our own Scalable Parallel Runtime effort (SPR) and the Trilinos stateless kernels. This design pattern is also shared by CUDA and several OpenMP extensions for GPU-type accelerators (e.g. the PGI OpenMP extensions).

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12 p.

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  • Report No.: SAND2011-7604
  • Grant Number: AC04-94AL85000
  • DOI: 10.2172/1029809 | External Link
  • Office of Scientific & Technical Information Report Number: 1029809
  • Archival Resource Key: ark:/67531/metadc839344

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Reports, articles and other documents harvested from the Office of Scientific and Technical Information.

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  • October 1, 2011

Added to The UNT Digital Library

  • May 19, 2016, 3:16 p.m.

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  • Dec. 8, 2016, 8:10 p.m.

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Wheeler, Kyle Bruce. Hierarchical resilience with lightweight threads., report, October 1, 2011; United States. (digital.library.unt.edu/ark:/67531/metadc839344/: accessed July 20, 2018), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.