A two-level fanout system for the CDF silicon vertex tracker Page: 1 of 4
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FERMILAB-Conf-01/292-E November 2001
A Two-Level Fanout System for the CDF Silicon Vertex
A. Bardi, M .Bari, S. Belforte, A. Cerri, M. Dell'Orso, S. Donati, S. Galeotti, P. Giannetti,
C. Magazzh, F. Morsani, G. Punzi, L. Ristori, F. Spinella, A. M. Zanetti
Abstract-The Fanout system is part of the Silicon Vertex
Tracker, a new trigger processor designed to reconstruct
charged particle trajectories at Level 2 of the CDF trig-
ger, with a latency of 10 ps and an event rate up to 100
kHz. The core of SVT is organized as 12 identical slices,
which process in parallel the data from the 12 independent
azimuthal wedges of the Silicon Vertex Detector (SVXII).
Each SVT slice links the digitized pulse heights found within
one SVXII wedge to the tracks reconstructed by the Level
1 fast track finder (XFT) in the corresponding 300 angular
region of the Central Outer Tracker. Since the XFT tracks
are transmitted to SVT as a single data stream, their distri-
bution to the proper SVT slices requires dedicated fanout
logic. The Fanout system has been implemented as a multi-
board project running on a common 20 MHz clock. Track
fanout is performed in two steps by one "Fanout A" and
two "Fanout B" boards. The architecture, design, and im-
plementation of this system are described.
The main functional blocks of each Silicon Vertex
Tracker slice are the Hit Finders, the Associative Memory
system, the Hit Buffer and the Track Fitter  . Every
time an event is accepted by the Level 1 trigger, the dig-
itized pulse heights in the Silicon Vertex Detector  are
sent to the Hit Finders which calculate hit positions. The
hits found by the Hit Finders and the raw tracks found in
the Central Outer tracker by the Level 1 Fast Track finder
 are then fed to both the Associative Memory system
and to the Hit Buffer . The Associative Memory sys-
tem performs pattern recognition by selecting for further
processing the combinations of XFT tracks and SVXII hits
that represent good track candidates. This is done by com-
paring the input data with a stored set of patterns in a com-
pletely parallel way, using a dedicated custom VLSI chip
(AM chip ). The AM system outputs a list of Roads.
Each Road is defined as a combination of SuperStrips on
five different detector layers that can be traversed by a
single track. The SuperStrips used to define the Roads
correspond to the hit positions on four silicon layers, while
the fifth SuperStrip is a function of the track parameters
reconstructed by the XFT (track curvature and azimuthal
Manuscript received on November 4, 2000.
Corresponding author S. Donati is with INFN-Pisa, Via Livornese
1291, 56010 San Piero a Grado, Pisa, Italy (phone +39 050 880239,
M. Dell'Orso, Dipartimento di Fisica, University di Pisa, Piazza
Torricelli 2, 56100 Pisa, Italy
A. Bardi, S. Belforte, S. Galeotti, P. Giannetti, C. Magazzu, F. Mor-
sani, L. Ristori, F. Spinella, INFN Pisa, Via Livornese 1291, 56010
S.Piero A Grado (PI), Italy
A. Ceri, G. Punzi, Scuola Normale Superiore, 56100 Pisa, Italy
M. Bari, A. M. Zanetti, INFN Trieste, Area di Ricerca - Padriciano
99, 34012 Trieste, Italy
angle measured at the sixth superlayer of the COT at 106
cm from the beamline). To reduce the amount of required
memory this pattern recognition process is carried out at
a coarser resolution than the full available resolution. The
Roads found by the AM system are sent to the Hit Buffer,
that retrieves the original full-resolution silicon hit coor-
dinates and the XFT track associated to each Road and
delivers them to the Track Fitter system for full-precision
computation of track parameters.
The Fanout system has two main functions: performing
the distribution of the XFT tracks to the proper SVT slices
and mapping the two XFT track parameters to a single
coordinate which is banned in SuperStrips and is used by
the AM system. Simulation studies have shown that the
most efficient use of the Associative Memory is obtained
by using as SuperStrip the azimuthal angle of the XFT
track extrapolated to a distance of about 10 cm from the
beamline and a SuperStrip size of 25 mrad. For each XFT
track received in input, the Fanout outputs a two word
packet: the first word contains the SuperStrip number used
by the AM system, while the second word is a copy of the
input word and is used by the Track Fitter for the full-
precision reconstruction of the track. For each event the
Fanout receives also from the Global Level 1 trigger the
information of which among the 64 CDF Level 1 triggers
were fired. This information is summarized and output
from the Fanout as two bits in the special word used within
the SVT system to mark the end of each event and to record
diagnostic information (End Event word).
II. ARCHITECTURE AND DATA FORMAT
The Fanout system is organized as a set of three (one
of type "A" and two of type "B") 9U x 400 VME boards.
Communication between the Fanout A and the two Fanout
B boards takes place through a customized P3 backplane,
with data flowing from A to B. All the input streams to the
Fanout system are received by the A board through three
connectors placed on its front panel. One stream carries the
XFT tracks and two carry the L1 trigger decisions. Data
to the rest of the SVT are output only from the Fanout
B boards. Each Fanout B has 6 output connectors on the
front panel and feeds 6 SVT slices.
Both the XFT data and the data output from the B
boards conform to the standard SVT data format while L1
trigger data have a different format. SVT and XFT data
occupy 25 bit words. In each word there are 21 data bits
(the 21 least significant bits), an End Packet (EP), an End
Event (EE), a Data Strobe (DS ) and a Hold (HD) signal
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al., A. Bardi et. A two-level fanout system for the CDF silicon vertex tracker, article, November 2, 2001; Batavia, Illinois. (https://digital.library.unt.edu/ark:/67531/metadc718395/m1/1/: accessed April 22, 2019), University of North Texas Libraries, Digital Library, https://digital.library.unt.edu; crediting UNT Libraries Government Documents Department.