IC chip stress during plastic package molding

PDF Version Also Available for Download.

Description

Approximately 95% of the world`s integrated chips are packaged using a hot, high pressure transfer molding process. The stress created by the flow of silica powder loaded epoxy can displace the fine bonding wires and can even distort the metalization patterns under the protective chip passivation layer. In this study the authors developed a technique to measure the mechanical stress over the surface of an integrated circuit during the molding process. A CMOS test chip with 25 diffused resistor stress sensors was applied to a commercial lead frame. Both compression and shear stresses were measured at all 25 locations on ... continued below

Physical Description

8 p.

Creation Information

Palmer, D.W.; Benson, D.A.; Peterson, D.W. & Sweet, J.N. February 1, 1998.

Context

This article is part of the collection entitled: Office of Scientific & Technical Information Technical Reports and was provided by UNT Libraries Government Documents Department to Digital Library, a digital repository hosted by the UNT Libraries. It has been viewed 20 times . More information about this article can be viewed below.

Who

People and organizations associated with either the creation of this article or its content.

Sponsor

Publisher

  • Sandia National Laboratories
    Publisher Info: Sandia National Labs., Albuquerque, NM (United States)
    Place of Publication: Albuquerque, New Mexico

Provided By

UNT Libraries Government Documents Department

Serving as both a federal and a state depository library, the UNT Libraries Government Documents Department maintains millions of items in a variety of formats. The department is a member of the FDLP Content Partnerships Program and an Affiliated Archive of the National Archives.

Contact Us

What

Descriptive information to help identify this article. Follow the links below to find similar items on the Digital Library.

Description

Approximately 95% of the world`s integrated chips are packaged using a hot, high pressure transfer molding process. The stress created by the flow of silica powder loaded epoxy can displace the fine bonding wires and can even distort the metalization patterns under the protective chip passivation layer. In this study the authors developed a technique to measure the mechanical stress over the surface of an integrated circuit during the molding process. A CMOS test chip with 25 diffused resistor stress sensors was applied to a commercial lead frame. Both compression and shear stresses were measured at all 25 locations on the surface of the chip every 50 milliseconds during molding. These measurements have a fine time and stress resolution which should allow comparison with computer simulation of the molding process, thus allowing optimization of both the manufacturing process and mold geometry.

Physical Description

8 p.

Notes

OSTI as DE98002897

Source

  • 48. Electronic component and technology (ECTC) conference, Seattle, WA (United States), 25-28 May 1998

Language

Item Type

Identifier

Unique identifying numbers for this article in the Digital Library or other systems.

  • Other: DE98002897
  • Report No.: SAND--98-0383C
  • Report No.: CONF-980550--
  • Grant Number: AC04-94AL85000
  • Office of Scientific & Technical Information Report Number: 654171
  • Archival Resource Key: ark:/67531/metadc709989

Collections

This article is part of the following collection of related materials.

Office of Scientific & Technical Information Technical Reports

Reports, articles and other documents harvested from the Office of Scientific and Technical Information.

Office of Scientific and Technical Information (OSTI) is the Department of Energy (DOE) office that collects, preserves, and disseminates DOE-sponsored research and development (R&D) results that are the outcomes of R&D projects or other funded activities at DOE labs and facilities nationwide and grantees at universities and other institutions.

What responsibilities do I have when using this article?

When

Dates and time periods associated with this article.

Creation Date

  • February 1, 1998

Added to The UNT Digital Library

  • Sept. 12, 2015, 6:31 a.m.

Description Last Updated

  • April 13, 2016, 2:12 p.m.

Usage Statistics

When was this article last used?

Yesterday: 0
Past 30 days: 1
Total Uses: 20

Interact With This Article

Here are some suggestions for what to do next.

Start Reading

PDF Version Also Available for Download.

Citations, Rights, Re-Use

Palmer, D.W.; Benson, D.A.; Peterson, D.W. & Sweet, J.N. IC chip stress during plastic package molding, article, February 1, 1998; Albuquerque, New Mexico. (digital.library.unt.edu/ark:/67531/metadc709989/: accessed April 24, 2018), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.