Capacitor mismatch caused by oxide thickness variations in submicron I. C. processes

PDF Version Also Available for Download.

Description

Chip design in submicron processes will present new challenges and problems which were not present in designs with larger dimension processes. One effect in the newer processes is the field oxide thickness variation due to interconnect density variations. This effect becomes much more extreme for the smaller dimension processes. Large density discontinuities can cause lower yield and will also result in capacitor value mismatch over substantial distances from the edges of a large array when using poly/metal capacitors. If good matching in this type of large area capacitor array is required, the only way to achieve this is to guarantee ... continued below

Physical Description

570 Kilobytes

Creation Information

Zimmerman, Tom May 4, 1999.

Context

This report is part of the collection entitled: Office of Scientific & Technical Information Technical Reports and was provided by UNT Libraries Government Documents Department to Digital Library, a digital repository hosted by the UNT Libraries. More information about this report can be viewed below.

Who

People and organizations associated with either the creation of this report or its content.

Sponsor

Publisher

Provided By

UNT Libraries Government Documents Department

Serving as both a federal and a state depository library, the UNT Libraries Government Documents Department maintains millions of items in a variety of formats. The department is a member of the FDLP Content Partnerships Program and an Affiliated Archive of the National Archives.

Contact Us

What

Descriptive information to help identify this report. Follow the links below to find similar items on the Digital Library.

Description

Chip design in submicron processes will present new challenges and problems which were not present in designs with larger dimension processes. One effect in the newer processes is the field oxide thickness variation due to interconnect density variations. This effect becomes much more extreme for the smaller dimension processes. Large density discontinuities can cause lower yield and will also result in capacitor value mismatch over substantial distances from the edges of a large array when using poly/metal capacitors. If good matching in this type of large area capacitor array is required, the only way to achieve this is to guarantee nearly constant metal/ poly density for at least 1500 microns (this distance will likely depend on the process) around the edges of the array. If the array boundary is close to the chip edge, then dummy capacitors should be placed up to the chip edge, and another layout with similar density must be placed as close as possible to the relevant edges of the chip in the reticle. When using a standard MOSIS reticle size, this may entail placing dummy chip layouts around the chips of interest in order to guarantee that identical density exists for the required distance outside of any chip�s borders.

Physical Description

570 Kilobytes

Subjects

Keywords

STI Subject Categories

Language

Item Type

Identifier

Unique identifying numbers for this report in the Digital Library or other systems.

  • Other: DE00006616
  • Report No.: FERMILAB-TM-2077
  • Grant Number: NONE
  • DOI: 10.2172/6616 | External Link
  • Office of Scientific & Technical Information Report Number: 6616
  • Archival Resource Key: ark:/67531/metadc702608

Collections

This report is part of the following collection of related materials.

Office of Scientific & Technical Information Technical Reports

What responsibilities do I have when using this report?

When

Dates and time periods associated with this report.

Creation Date

  • May 4, 1999

Added to The UNT Digital Library

  • Sept. 12, 2015, 6:31 a.m.

Description Last Updated

  • April 18, 2016, 2:33 p.m.

Usage Statistics

When was this report last used?

Yesterday: 0
Past 30 days: 1
Total Uses: 8

Interact With This Report

Here are some suggestions for what to do next.

Start Reading

PDF Version Also Available for Download.

Citations, Rights, Re-Use

Zimmerman, Tom. Capacitor mismatch caused by oxide thickness variations in submicron I. C. processes, report, May 4, 1999; Batavia, Illinois. (digital.library.unt.edu/ark:/67531/metadc702608/: accessed August 23, 2017), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.