A top-down approach to high-consequence fault analysis for software systems

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Even if software code is fault-free, hardware failures can alter a value in memory, possibly where the code itself is stored, causing a computer system to reach an unacceptable state. Microprocessor systems are used to perform many safety and security functions where a design goal is to eliminate single-point failures such as these. One design approach is to use multiple processors, compare the outputs, and assume a failure has occurred if the outputs don`t agree. In systems where the design is constrained to a single processor, however, analytical methods are needed to identify potential single-point failures at the bit level ... continued below

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19 p.

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Fronczak, E. April 1, 1997.

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  • Sandia National Laboratories
    Publisher Info: Sandia National Labs., Albuquerque, NM (United States)
    Place of Publication: Albuquerque, New Mexico

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Description

Even if software code is fault-free, hardware failures can alter a value in memory, possibly where the code itself is stored, causing a computer system to reach an unacceptable state. Microprocessor systems are used to perform many safety and security functions where a design goal is to eliminate single-point failures such as these. One design approach is to use multiple processors, compare the outputs, and assume a failure has occurred if the outputs don`t agree. In systems where the design is constrained to a single processor, however, analytical methods are needed to identify potential single-point failures at the bit level so that an effective fault-tolerant strategy can be employed. This paper describes a top-down methodology, based upon Fault Tree Analysis, that has been used to identify potential high-consequence faults in microprocessor-based systems. The key to making the Fault Tree Analysis tractable is to effectively incorporate appropriate design features such as software path control and checksums so that complicated branches of the fault tree can be terminated early. The analysis uses simplified software flow diagrams depicting relevant code elements. Pertinent sections of machine language are then examined to identify suspect hardware. A comparison of this methodology with approaches based upon Failure Modes and Effects Analysis is made. The methodology is demonstrated through a simple example. Use of fault trees to show that software code is free of safety or security faults is also demonstrated.

Physical Description

19 p.

Notes

OSTI as DE97004445

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  • International symposium on software reliability engineering, Albuquerque, NM (United States), 2-5 Nov 1997

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  • Other: DE97004445
  • Report No.: SAND--97-0783C
  • Report No.: CONF-971119--1
  • Grant Number: AC04-94AL85000
  • Office of Scientific & Technical Information Report Number: 537363
  • Archival Resource Key: ark:/67531/metadc691117

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Office of Scientific & Technical Information Technical Reports

Reports, articles and other documents harvested from the Office of Scientific and Technical Information.

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  • April 1, 1997

Added to The UNT Digital Library

  • Aug. 14, 2015, 8:43 a.m.

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  • April 14, 2016, 8:14 p.m.

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Fronczak, E. A top-down approach to high-consequence fault analysis for software systems, article, April 1, 1997; Albuquerque, New Mexico. (digital.library.unt.edu/ark:/67531/metadc691117/: accessed September 23, 2018), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.