Loop parallelism on Tera MTA using SISAL

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The difficulty of programming parallel computers has impeded their wide-spread use. The problems are caused by existing hardware and software tools. The software problems on shared-memory and vector computers can be solved by using deterministic high-performance functional languages like SISAL. Distributed-memory computers have even more obstacles than shared-memory parallel machines. Research indicates that multithreaded architectures can hide long latency of distributed memories and that they can solve the problems of locality. Tera`s MTA multiprocessor is based on the concept of multithreading and provides the programmer with a real shared-memory model. This paper investigates the performance of parallel loops written in ... continued below

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11 p.

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Mitrovic, S. November 1, 1995.

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Description

The difficulty of programming parallel computers has impeded their wide-spread use. The problems are caused by existing hardware and software tools. The software problems on shared-memory and vector computers can be solved by using deterministic high-performance functional languages like SISAL. Distributed-memory computers have even more obstacles than shared-memory parallel machines. Research indicates that multithreaded architectures can hide long latency of distributed memories and that they can solve the problems of locality. Tera`s MTA multiprocessor is based on the concept of multithreading and provides the programmer with a real shared-memory model. This paper investigates the performance of parallel loops written in SISAL and executed on the Tera MTA using the Livermore Loops benchmarks.

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11 p.

Notes

OSTI as DE96006767

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  • PDPTA `95: international conference on parallel and distributed processing techniques and applications, Athens, GA (United States), 3-4 Nov 1995

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  • Other: DE96006767
  • Report No.: UCRL-JC--122696
  • Report No.: CONF-9511199--1
  • Grant Number: W-7405-ENG-48
  • Office of Scientific & Technical Information Report Number: 224967
  • Archival Resource Key: ark:/67531/metadc673072

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  • November 1, 1995

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  • June 29, 2015, 9:42 p.m.

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  • Feb. 23, 2016, 4:25 p.m.

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Mitrovic, S. Loop parallelism on Tera MTA using SISAL, article, November 1, 1995; California. (digital.library.unt.edu/ark:/67531/metadc673072/: accessed August 24, 2017), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.