Multi-level interconnects for heterojunction bipolar transistor integrated circuit technologies

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Heterojunction bipolar transistors (HBTs) are mesa structures which present difficult planarization problems in integrated circuit fabrication. The authors report a multilevel metal interconnect technology using Benzocyclobutene (BCB) to implement high-speed, low-power photoreceivers based on InGaAs/InP HBTs. Processes for patterning and dry etching BCB to achieve smooth via holes with sloped sidewalls are presented. Excellent planarization of 1.9 {micro}m mesa topographies on InGaAs/InP device structures is demonstrated using scanning electron microscopy (SEM). Additionally, SEM cross sections of both the multi-level metal interconnect via holes and the base emitter via holes required in the HBT IC process are presented. All via holes ... continued below

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18 p.

Creation Information

Patrizi, G.A.; Lovejoy, M.L.; Schneider, R.P. Jr.; Hou, H.Q. & Enquist, P.M. December 31, 1995.

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  • Sandia National Laboratories
    Publisher Info: Sandia National Labs., Albuquerque, NM (United States)
    Place of Publication: Albuquerque, New Mexico

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Description

Heterojunction bipolar transistors (HBTs) are mesa structures which present difficult planarization problems in integrated circuit fabrication. The authors report a multilevel metal interconnect technology using Benzocyclobutene (BCB) to implement high-speed, low-power photoreceivers based on InGaAs/InP HBTs. Processes for patterning and dry etching BCB to achieve smooth via holes with sloped sidewalls are presented. Excellent planarization of 1.9 {micro}m mesa topographies on InGaAs/InP device structures is demonstrated using scanning electron microscopy (SEM). Additionally, SEM cross sections of both the multi-level metal interconnect via holes and the base emitter via holes required in the HBT IC process are presented. All via holes exhibit sloped sidewalls with slopes of 0.4 {micro}m/{micro}m to 2 {micro}m/{micro}m which are needed to realize a robust interconnect process. Specific contact resistances of the interconnects are found to be less than 6 {times} 10{sup {minus}8} {Omega}cm{sup 2}. Integrated circuits utilizing InGaAs/InP HBTs are fabricated to demonstrate the applicability and compatibility of the multi-level interconnect technology with integrated circuit processing.

Physical Description

18 p.

Notes

OSTI as DE96008870

Source

  • ICMCTF `96: international conference on metallurgical coatings and thin films, San Diego, CA (United States), 22-26 Apr 1996

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  • Other: DE96008870
  • Report No.: SAND--95-2218C
  • Report No.: CONF-960457--3
  • Grant Number: AC04-94AL85000
  • DOI: 10.2172/212553 | External Link
  • Office of Scientific & Technical Information Report Number: 212553
  • Archival Resource Key: ark:/67531/metadc666486

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  • December 31, 1995

Added to The UNT Digital Library

  • June 29, 2015, 9:42 p.m.

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  • April 14, 2016, 8:41 p.m.

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Patrizi, G.A.; Lovejoy, M.L.; Schneider, R.P. Jr.; Hou, H.Q. & Enquist, P.M. Multi-level interconnects for heterojunction bipolar transistor integrated circuit technologies, report, December 31, 1995; Albuquerque, New Mexico. (digital.library.unt.edu/ark:/67531/metadc666486/: accessed December 15, 2017), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.