Low-power, parallel photonic interconnections for Multi-Chip Module applications

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New applications of photonic interconnects will involve the insertion of parallel-channel links into Multi-Chip Modules (MCMs). Such applications will drive photonic link components into more compact forms that consume far less power than traditional telecommunication data links. MCM-based applications will also require simplified drive circuitry, lower cost, and higher reliability than has been demonstrated currently in photonic and optoelectronic technologies. The work described is a parallel link array, designed for vertical (Z-Axis) interconnection of the layers in a MCM-based signal processor stack, operating at a data rate of 100 Mb/s. This interconnect is based upon high-efficiency VCSELs, HBT photoreceivers, integrated ... continued below

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7 p.

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Carson, R.F.; Lovejoy, M.L. & Lear, K.L. December 31, 1994.

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This article is part of the collection entitled: Office of Scientific & Technical Information Technical Reports and was provided by UNT Libraries Government Documents Department to Digital Library, a digital repository hosted by the UNT Libraries. It has been viewed 13 times . More information about this article can be viewed below.

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  • Sandia National Laboratories
    Publisher Info: Sandia National Labs., Albuquerque, NM (United States)
    Place of Publication: Albuquerque, New Mexico

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New applications of photonic interconnects will involve the insertion of parallel-channel links into Multi-Chip Modules (MCMs). Such applications will drive photonic link components into more compact forms that consume far less power than traditional telecommunication data links. MCM-based applications will also require simplified drive circuitry, lower cost, and higher reliability than has been demonstrated currently in photonic and optoelectronic technologies. The work described is a parallel link array, designed for vertical (Z-Axis) interconnection of the layers in a MCM-based signal processor stack, operating at a data rate of 100 Mb/s. This interconnect is based upon high-efficiency VCSELs, HBT photoreceivers, integrated micro-optics, and MCM-compatible packaging techniques.

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7 p.

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OSTI as DE95008518

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  • 45. electronic components and technology conference, Las Vegas, NV (United States), 22-26 May 1995

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  • Other: DE95008518
  • Report No.: SAND--94-2878C
  • Report No.: CONF-9505121--1
  • Grant Number: AC04-94AL85000
  • Office of Scientific & Technical Information Report Number: 28420
  • Archival Resource Key: ark:/67531/metadc665647

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Office of Scientific & Technical Information Technical Reports

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  • December 31, 1994

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  • June 29, 2015, 9:42 p.m.

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  • April 14, 2016, 4:16 p.m.

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Carson, R.F.; Lovejoy, M.L. & Lear, K.L. Low-power, parallel photonic interconnections for Multi-Chip Module applications, article, December 31, 1994; Albuquerque, New Mexico. (digital.library.unt.edu/ark:/67531/metadc665647/: accessed December 14, 2018), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.