Flight code validation simulator Page: 1 of 6
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Flight Code Validation Simulator % F-
Brent A. Sims*
Sandia National Laboratories, Albuquerque, New Mexico 87185
An End-To-End Simulation capability for software development and validation of missile flight software on the
actual embedded computer has been developed utilizing a 486 PC, i860 DSP coprocessor, embedded flight
computer and custom dual port memory interface hardware. This system allows real-time interrupt driven
embedded flight software development and checkout. The flight software runs in a Sandia Digital Airborne
Computer (SANDAC) and reads and writes actual hardware sensor locations in which IMU (Inertial Measurement
Unit) data resides. The simulator provides six degree of freedom real-time dynamic simulation, accurate real-time
discrete sensor data and acts on commands and discretes from the flight computer. This system was utilized in the
development and validation of the successful premier flight of the Digital Miniature Attitude Reference System
(DMARS) in January of 1995 at the White Sands Missile Range on a two stage attitude controlled sounding rocket.
This paper describes a system to develop
and validate flight software and hardware
interactions for rocket systems. This system may be
used for any computer software/hardware interaction
which requires simulation and off-line validation
prior to the desired use or event.
The application for this system is to provide
an environment in which flight software, including
inertial navigation, attitude control (spinning and 3-
axis stabilized), guidance and flight sequencing, is
exercised in real-time and as close to actual flight
conditions as possible. Typically, for a given flight
no less than forty perturbations to the simulated
trajectory and systems performance are run against
the flight software/hardware to prove its validity and
correct response to predicted perturbations.
The system, designed to fulfill these
requirements, incorporates an i860 DSP board on the
AT bus of a 486 PC. Custom hardware was designed
to interface between the i860 and the flight computer
and its flight Input/Output (I/O) boards. Advantages
of this system are the relatively low cost and
transportability, since most rocket launches and
hardware checkouts occur at remote site locations.
The remainder of this paper describes the
hardware and software in the flight system and the
simulation system. It also explains the results of the
test and, consequently, the success of the simulation
and validation computer hardware and software.
II. Rocket System Hardware
The rocket system utilized on this flight was
a two stage spin stabilized sounding rocket with
attitude control and autonomous linearized guidance
for dispersion reduction and flight sequence control.
The first stage consisted of a Terrier Mk 12 rocket
*Senior Member of Technical Staff, Member of AIAA
I)ISTRIBUT10f, OF CU~ D~ E 13 UNLIN
motor. The second stage was an Improved Orion
rocket motor. This system was rail launched at the
White Sands Missile Range from Launch Complex
36 off of the NASA Athena Launcher (see figure 1).
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Sims, B.A. Flight code validation simulator, article, August 1, 1995; Albuquerque, New Mexico. (https://digital.library.unt.edu/ark:/67531/metadc624777/m1/1/: accessed April 20, 2019), University of North Texas Libraries, Digital Library, https://digital.library.unt.edu; crediting UNT Libraries Government Documents Department.