Surface morphology evolution in silicon during ion beam processing

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The Semiconductor Industry Association (SIA) projects that the semiconductor chips used in personal computers and scientific workstations will reach five times the speed and ten times the memory capacity of the current pentium-class processor by the year 2007. However, 1 GHz on-chip clock speeds and 64 Gbits/Chip DRAM technology will not come easy and without a price. Such technologies will require scaling the minimum feature size of CMOS devices (the transistors in the silicon chip) down to below 100nm from the current 180 to 250 nm. This requirement has profound implications for device manufacturing. Existing processing techniques must increasingly be ... continued below

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506 Kilobytes pages

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P, Bedrossian; Caturla, M; Diaz de la Rubia, T & Johnson, M August 1, 1999.

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The Semiconductor Industry Association (SIA) projects that the semiconductor chips used in personal computers and scientific workstations will reach five times the speed and ten times the memory capacity of the current pentium-class processor by the year 2007. However, 1 GHz on-chip clock speeds and 64 Gbits/Chip DRAM technology will not come easy and without a price. Such technologies will require scaling the minimum feature size of CMOS devices (the transistors in the silicon chip) down to below 100nm from the current 180 to 250 nm. This requirement has profound implications for device manufacturing. Existing processing techniques must increasingly be understood quantitatively and modeled with unprecedented precision. Indeed, revolutionary advances in the development of physics-based process simulation tools will be required to achieve the goals for cost efficient manufacturing, and to satisfy the needs of the defense industrial base. These advances will necessitate a fundamental improvement in our basic understanding of microstructure evolution during processing. In order to cut development time and costs, the semiconductor industry makes extensive use of simple models of dopant implantation, and of phenomenological models of defect annealing and diffusion. However, the production of a single device often requires more than 200 processing steps, and the cumulative effects of the various steps are far too complex to be treated with these models. The lack of accurate process modeling simulators is proving to be a serious impediment to the development of next generation devices. New atomic-level models are required to describe the point defect distributions produced by the implantation process, and the defect and dopant diffusion resulting from rapid thermal annealing steps. In this LDRD project, we investigated the migration kinetics of defects and dopants in silicon both experimentally and theoretically to provide a fundamental database for use in the development of predictive process simulators. The results were then used to develop kinetic Monte Carlo simulations that, when coupled to molecular dynamics studies, could be used to study and compare the long time and length scale behavior of ion implanted silicon to the predictions of experiments. The results of these kinetic Monte Carlo simulations were validated with experimental data and then used to predict boron activation fractions during annealing of ion implanted silicon under conditions similar to those encountered in the semiconductor manufacturing environment. The success of the work and promise of the approach are reflected in the number of publication and in the fact that following completion of the project we signed a funds-in CRADA with Intel corporation and Applied Materials Corporation to continue the research.

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506 Kilobytes pages

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  • Other Information: PBD: 1 Aug 1999

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  • Report No.: UCRL-ID-135236
  • Report No.: YN0100000
  • Report No.: 96-ERD-009
  • Grant Number: W-7405-ENG-48
  • DOI: 10.2172/13856 | External Link
  • Office of Scientific & Technical Information Report Number: 13856
  • Archival Resource Key: ark:/67531/metadc622641

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Office of Scientific & Technical Information Technical Reports

Reports, articles and other documents harvested from the Office of Scientific and Technical Information.

Office of Scientific and Technical Information (OSTI) is the Department of Energy (DOE) office that collects, preserves, and disseminates DOE-sponsored research and development (R&D) results that are the outcomes of R&D projects or other funded activities at DOE labs and facilities nationwide and grantees at universities and other institutions.

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  • August 1, 1999

Added to The UNT Digital Library

  • June 16, 2015, 7:43 a.m.

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  • May 6, 2016, 2:04 p.m.

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P, Bedrossian; Caturla, M; Diaz de la Rubia, T & Johnson, M. Surface morphology evolution in silicon during ion beam processing, report, August 1, 1999; California. (digital.library.unt.edu/ark:/67531/metadc622641/: accessed June 20, 2018), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.