High Performance Architecture using Speculative Threads and Dynamic Memory Management Hardware Metadata

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Title

  • Main Title High Performance Architecture using Speculative Threads and Dynamic Memory Management Hardware

Creator

  • Author: Li, Wentong
    Creator Type: Personal

Contributor

  • Chair: Kavi, Krishna M.
    Contributor Type: Personal
    Contributor Info: Major Professor
  • Committee Member: Sweany, Philip H.
    Contributor Type: Personal
    Contributor Info: Minor Professor
  • Committee Member: Brazile, Robert
    Contributor Type: Personal
  • Committee Member: Mohanty, Saraju P.
    Contributor Type: Personal

Publisher

  • Name: University of North Texas
    Place of Publication: Denton, Texas

Date

  • Creation: 2007-12
  • Digitized: 2008-02-01

Language

  • English

Description

  • Content Description: With the advances in very large scale integration (VLSI) technology, hundreds of billions of transistors can be packed into a single chip. With the increased hardware budget, how to take advantage of available hardware resources becomes an important research area. Some researchers have shifted from control flow Von-Neumann architecture back to dataflow architecture again in order to explore scalable architectures leading to multi-core systems with several hundreds of processing elements. In this dissertation, I address how the performance of modern processing systems can be improved, while attempting to reduce hardware complexity and energy consumptions. My research described here tackles both central processing unit (CPU) performance and memory subsystem performance. More specifically I will describe my research related to the design of an innovative decoupled multithreaded architecture that can be used in multi-core processor implementations. I also address how memory management functions can be off-loaded from processing pipelines to further improve system performance and eliminate cache pollution caused by runtime management functions.

Subject

  • Keyword: memory management
  • Keyword: Thread level speculation
  • Keyword: data flow architecture
  • Keyword: decoupled architecture
  • Library of Congress Subject Headings: Computer architecture.
  • Library of Congress Subject Headings: Memory management (Computer science)

Collection

  • Name: UNT Theses and Dissertations
    Code: UNTETD

Institution

  • Name: UNT Libraries
    Code: UNT

Rights

  • Rights Access: public
  • Rights License: copyright
  • Rights Holder: Li, Wentong
  • Rights Statement: Copyright is held by the author, unless otherwise noted. All rights reserved.

Resource Type

  • Thesis or Dissertation

Format

  • Text

Identifier

  • OCLC: 228427467
  • Archival Resource Key: ark:/67531/metadc5150

Degree

  • Degree Name: Doctor of Philosophy
  • Degree Level: Doctoral
  • Degree Discipline: Computer Science
  • Academic Department: Department of Computer Science and Engineering
  • Degree Grantor: University of North Texas

Note

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