Framework for Design Validation of Security Architectures Page: 13
The following text was automatically extracted from the image on this page using optical character recognition software:
 J. Dwoskin, D. Xu, J. Huang, M. Chiang,
and R. Lee, "Secure Key Management Architec-
ture Against Sensor-node Fabrication Attacks," in
 D. Lie, C. A. Thekkath, M. Mitchell, P. Lincoln,
D. Boneh, J. C. Mitchell, and M. Horowitz, "Ar-
chitectural Support for Copy and Tamper Resis-
tant Software," in Intl. Conference on Architectural
Support for Programming Languages and Operating
Systems (ASPLOS), pp. 168-177, 2000.
 G. E. Suh, D. E. Clarke, B. Gassend, M. van Dijk,
and S. Devadas, "AEGIS: Architecture for Tamper-
evident and Tamper-resistant Processing," in Intl.
Conference on Supercomputing (ICS), pp. 160-171,
 G. E. Suh, C. W. O'Donnell, I. Sachdev, and S. De-
vadas, "Design and Implementation of the AEGIS
Single-Chip Secure Processor Using Physical Ran-
dom Functions," in Intl. Conference on Computer
Architecture (ISCA), pp. 25-36, 2005.
 G. E. Suh, C. W. O'Donnell, and S. Devadas,
"Aegis: A Single-Chip Secure Processor," IEEE
Design & Test of Computers, vol. 24, no. 6,
pp. 570-580, 2007.
 M. Gomathisankaran and A. Tyagi, "Arc3D : A 3D
Obfuscation Architecture," in High Performance
Embedded Architectures and Compilers (HiPEAC),
pp. 184-199, Springer, 2005.
 M. Gomathisankaran and A. Tyagi, "Architecture
Support for 3D Obfuscation," IEEE Trans. Com-
puters, vol. 55, no. 5, pp. 497-507, 2006.
 Truscted Computing Group, Trusted Plat-
form Module Specification Version 1.2 Re-
vision 103, July 2007. https: //www.
 T. Austin, E. Larson, and D. Ernst, "SimpleScalar:
An Infrastructure for Computer System Model-
ing," Computer, vol. 35, pp. 59-67, February 2002.
 D. Mihocka and S. Shwartsman, "Virtualization
Without Direct Execution or Jitting: Designing
a Portable Virtual Machine Infrastructure," in 1t
Workshop on Architectural and Microarchitectural
Support for Binary Translation in ISCA-35, (Bei-
jing), June 2008.
 F. Bellard, "QEMU, a Fast and Portable Dynamic
Translator," in USENIX Annual Technical Confer-
ence, FREENIX Track, pp. 41-46, 2005.
 P. Barham, B. Dragovic, K. Fraser, S. Hand,
T. Harris, A. Ho, R. Neugebauer, I. Pratt, and
A. Warfield, "Xen and the art of virtualization,"
in SOSP '03: Proceedings of the nineteenth ACM
symposium on Operating systems principles, (New
York, NY, USA), pp. 164-177, ACM, 2003.
 S. Berger, R. Caceres, K. A. Goldman, R. Perez,
R. Sailer, and L. van Doorn, "vTPM: Virtual-
izing the Trusted Platform Module," Tech. Rep.
RC23879, IBM, February 2006.
 V. Scarlata, C. Rozas, M. Wiseman, D. Grawrock,
and C. Vishik, Trusted Computing, ch. TPM Virtu-
alization: Building a General Framework, pp. 43-
56. Springer, 2008.
 M. Strasser, H. Stamer, and J. Molina, "Software-
based TPM Emulator." http: //tpm-emulator .
berlios . de.
 W. A. Hunt, "Mechanical Mathematical Meth-
ods for Microprocessor Verification," in Intl. Con-
ference on Computer Aided Verification (CAV),
pp. 523-533, 2004.
 S. Ray and W. A. Hunt, "Deductive Verification of
Pipelined Machines Using First-Order Quantifica-
tion," in Intl. Conference on Computer Aided Ver-
ification (CA V), pp. 31-43, 2004.
 H. Iwashita, S. Kowatari, T. Nakata, and F. Hirose,
"Automatic test program generation for pipelined
processors," in Intl. Conference on Computer Aided
Design (ICCAD), pp. 580-583, 1994.
 R. C. Ho, C. H. Yang, M. Horowitz, and D. L.
Dill, "Architecture Validation for Processors," in
Int. Symposium on Computer Architecture (ISCA),
pp. 404-413, 1995.
 J. Bhadra, M. S. Abadir, L.-C. Wang, and S. Ray,
"A Survey of Hybrid Techniques for Functional
Verification," IEEE Design & Test of Computers,
vol. 24, no. 2, pp. 112-122, 2007.
 S. S. Moore, "Symbolic Simulation: An ACL2 Ap-
proach," in Formal Methods in Computer-Aided
Design, pp. 334-350, 1998.
 T. Nipkow, L. Paulson, and M. Wenzel, Isabelle's
This report can be searched. Note: Results may vary based on the legibility of text within the document.
Citing and Sharing
Basic information for referencing this web page. We also provide extended guidance on usage rights, references, copying or embedding.
Reference the current page of this Report.
Dwoskin, Jeffrey Scott, 1980-; Gomathisankaran, Mahadevan & Lee, Ruby Bei-Loh. Framework for Design Validation of Security Architectures, report, November 17, 2008; [Princeton, New Jersey]. (digital.library.unt.edu/ark:/67531/metadc130192/m1/13/: accessed February 26, 2017), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT College of Engineering.