FPGA Trigger System to Run Klystrons Page: 3 of 16
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Field Programmable Gate Array (FPGA) Based Trigger System for the Klystron Department.
Darius Gray, Alternative Paper, Science Undergraduate Laboratory Internship, SLAC National
Accelerator Laboratory, Summer 2009.
The Klystron Department is in need of a new trigger system to update the laboratory
capabilities. The objective of the research is to develop the trigger system using Field
Programmable Gate Array (FPGA) technology with a user interface that will allow one to
communicate with the FPGA via a Universal Serial Bus (USB). This trigger system will be used
for the testing of klystrons. The key materials used consists of the Xilinx Integrated Software
Environment (ISE) Foundation, a Programmable Read Only Memory (Prom) XCF04S, a Xilinx
Spartan 3E 355500E FPGA, Xilinx Platform Cable USB II, a Printed Circuit Board (PCB), a 100
MHz oscillator, and an oscilloscope. Key considerations include eight triggers, two of which
have variable phase shifting capabilities. Once the project was completed the output signals were
able to be manipulated via a Graphical User Interface by varying the delay and width of the
signal. This was as planned; however, the ability to vary the phase was not completed. Future
work could consist of being able to vary the phase. This project will give the operators in the
Klystron Department more flexibility to run various tests.
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Gray, Darius & /SLAC, /Texas A-M. FPGA Trigger System to Run Klystrons, report, August 25, 2010; [California]. (digital.library.unt.edu/ark:/67531/metadc1012441/m1/3/: accessed January 20, 2019), University of North Texas Libraries, Digital Library, digital.library.unt.edu; crediting UNT Libraries Government Documents Department.