A New Wireless Sensor Node Design for Program Isolation and Power Flexibility

A New Wireless Sensor Node Design for Program Isolation and Power Flexibility

Date: December 2009
Creator: Skelton, Adam W.
Description: Over-the-air programming systems for wireless sensor networks have drawbacks that stem from fundamental limitations in the hardware used in current sensor nodes. Also, advances in technology make it feasible to use capacitors as the sole energy storage mechanism for sensor nodes using energy harvesting, but most current designs require additional electronics. These two considerations led to the design of a new sensor node. A microcontroller was chosen that meets the Popek and Goldberg virtualization requirements. The hardware design for this new sensor node is presented, as well as a preliminary operating system. The prototypes are tested, and demonstrated to be sustainable with a capacitor and solar panel. The issue of capacitor leakage is considered and measured.
Contributing Partner: UNT Libraries
Real-Time Systems: An Introduction and the State-of-the-Art

Real-Time Systems: An Introduction and the State-of-the-Art

Date: March 16, 2009
Creator: Kavi, Krishna M.; Akl, Robert G. & Hurson, Ali
Description: This encyclopedia article gives an overview of the broad area of real-time systems. This task is daunting because real-time systems are everywhere, and yet no generally accepted definition differentiates real-time systems from non-real-time systems.
Contributing Partner: UNT College of Engineering
How to Hide Secrets from Operating System: Architecture Level Support for Dynamic Address Trace Obfuscation

How to Hide Secrets from Operating System: Architecture Level Support for Dynamic Address Trace Obfuscation

Date: 2004
Creator: Gomathisankaran, Mahadevan & Tyagi, Akhilesh
Description: This technical report addresses how to hide secrets from an operating system. The authors provide a detailed design for the VM blackbox and some microarchitecture level simulation derived performance data. They also describe a compiler directed prefetch scheme that uses both instruction and data prefetches to obfuscate the address traces on the address bus between on-chip L2 cache and memory.
Contributing Partner: UNT College of Engineering