A Verilog 8051 Soft Core for FPGA Applications
Description:
The objective of this thesis was to develop an 8051 microcontroller soft core in the Verilog hardware description language (HDL). Each functional unit of the 8051 microcontroller was developed as a separate module, and tested for functionality using the open-source VHDL Dalton model as benchmark. These modules were then integrated to operate as concurrent processes in the 8051 soft core. The Verilog 8051 soft core was then synthesized in Quartus® II simulation and synthesis environment (Altera…
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Date:
August 2009
Creator:
Rangoonwala, Sakina
Partner:
UNT Libraries