Modeling and reduction of gate leakage during behavioral synthesis of nanoscale CMOS circuits.
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Modeling and reduction of gate leakage during behavioral synthesis of nanoscale CMOS circuits., thesis, May 2006; Denton, Texas. (https://digital.library.unt.edu/ark:/67531/metadc5590/: accessed April 17, 2024), University of North Texas Libraries, UNT Digital Library, https://digital.library.unt.edu; .