FPGA Implementation of Low Density Party Check Codes Decoder Page: Title Page
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FPGA IMPLEMENTATION OF LOW DENSITY PARITY CHECK CODES DECODER
Suresh Vijayakumar
Thesis Prepared for the Degree of
MASTER OF SCIENCE
UNIVERSITY OF NORTH TEXAS
August 2009
APPROVED:
Armin R. Mikler, Major Professor and Graduate
Coordinator
Shengli Fu, Major Professor
Philip Sweany, Committee Member
Krishna M. Kavi, Chair, Dept of Computer
Science and Engineering
Bill Buckles, Associate Dean of the College of
Engineering
Costas Tsatsoulis, Dean of the College of
Engineering
Michael Monticino, Dean of the Robert B.
Toulouse School of Graduate Studies
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Vijayakumar, Suresh. FPGA Implementation of Low Density Party Check Codes Decoder, thesis, August 2009; Denton, Texas. (https://digital.library.unt.edu/ark:/67531/metadc11003/m1/1/: accessed April 17, 2024), University of North Texas Libraries, UNT Digital Library, https://digital.library.unt.edu; .